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TPS3820-50-Q1 WDI pin Questions

Deal all,

My customer has below questions about TPS3820-50-Q1. Could you help answer it? Thank you so much!

During WDI is high level , the N-MOS can not conduct fully, but work in the current limitation mode. You can refer the below pictures. So seems the N-MOS is redundant. Why do we put this circuit block in datasheet? What is its purpose?

  • Hi Jurry,
    The non-A version needs this NFET to decouple the WDI signal from its source when RST/ is asserted. If the FET is not there, the non-A version will latch RST/ low if a pulse on WDI is seen when RST/ is asserted low. When RST/ is low, the FET is turned off and the WDI source is disconnected from the pin to avoid latching RST/

    The MOSFET will be in the linear region as Vds=~0V and Vgs=~RESET - WDI, but as the WDI pin needs almost no current WDI = ~ WDI_external. If your WDI pulse is higher than Vout_h(min) + Vtn than the circuit may not work as the FET will be in cutoff.

    Regards,
    David