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UCC28950 Driver problem

Other Parts Discussed in Thread: UCC28950, UCC28070, UCC3895

Hello, I am currently using UCC28950 doing a 2KW prototype, with constant voltage constant current output (share the same loop with a diode OR gate), synchronous rectification EF useless, direct 10K to GND, is currently experiencing problems AB drive waveform good, CD drive slightly left and right output jitter, resulting in a slight noise at work. I am currently wondering is:

1, this is likely to be around the loop jitter problem, I adjust the loop parameters (capacitance for a few orders of magnitude), no change at all; jitter amplitude, different load sound, are the same,

2, why only about CD jitter, AB waveform is very good, I also try UCC28950 output from the AB and CD swap exclude output drive part of the hardware problem.

3. Will I get a sample is false?

   Look forward to your reply, if desired schematic or waveform analysis can provide, thank you!

  • “ucc28950 54tg4 c4x6” on the chip
  • Hello

    The OUTC / OUTD outputs are phase shifted with respect to the OUTA and OUTB outputs. The OUTA and OUTB pair are the reference pair. This is why you don't see any jitter on them.

    The OUTC and OUTD outputs will have some jitter on them due to the operation of the feedback loop as it adjusts the phase of OUTC/OUTD to maintain the output voltage at the regulation setpoint. The phase shift will move around in response to changes in the input voltage - if you are supplying the prototype from a rectified line voltage or from the output of a boost PFC there will be an inherent ripple voltage at the prototype's input and the control loop in the UCC28950 will adjust the OUTC/OUTD output phase shift to maintain a fixed output voltage.

    Jitter can also be caused by noise pickup - especially onto the CS pin (if you are using current mode control) or onto the EA inputs if you are using Voltage mode control.

    I think the controller sample you have is ok but if you have any doubts I suggest you simply change it.


  • Dear :

         First of all, thank you for your reply!

         Your answer, I can draw three point ,the input ripple, CS noise, EA noise。

        The Phase-shifted full-bridge input is boost PFC input (UCC28070),I tested PFC output with active  high voltage probe, close 50V ripple ( power grid frequency and PFC switch noise),In fact, I tested PF value of PFC is still very good, but a little high THD, when about 10% of 1.6KW output。

       CS noise there may be reasons for this, but in constant light load output CD there are some slight jitter, jitter course 1.5KW above is quite clear,

       EA noise, real-time yesterday I did some tried and tested, with an external op amp (MCP6022) as a voltage current loop adjustment, EA- and comp pin is connected directly on the chip, but on the original PCB EA- lead and comp cut, reducing noise pickup, also did not have any effect,

      Auxiliary power supply, PFC power supply control chip is used by bus from the flyback power supply. UCC28950 is separate from the power grid 220VAC rectified through the flyback power supply,

       Today I made an interesting attempt to UCC28950 chip soldered down, re-do a small PCB board with UCC3895 do master (in fact our mature products have been using the UCC3895), only a small piece of board peripheral UCC3895 structures, and does not involve sampling and loop (as you said my sampling no problem), and then use any external op-amps do loop control, work very well, no longer shake, 1.8KW run afternoon.

  • Hi

    I've been out of the office for a while but it looks like you are making progress. I'll assume everything is under control at your end but please do reply to this post if you need any further information.


  • Hi Colin:

    thank you for your reply first,recently I had other.FOR  the UCC28950's CD output jitter ,there some explanation in TI's archive (0726.sluu421a),page 19

     My prototype architecture is UCC28070 interleaved PFC + UCC3895 phase-shifted full-bridge, another problem I encountered is that when I will be reduced to a 190VAC power input when the (sometimes in Chinese rural power grid voltage will fall 170VAC)full-bridge output 70V30A (2100W), full-bridge output noise suddenly increases, is observed with an oscilloscope grid frequency, as shown, is 2.42V peak to peak


              In fact, if the power input above190VAC and full-bridge output 70V, 30A, this will not happen; I also did some tests: Close-stage full-bridge, PFC input 170VAC, PFC output 390VDC, direct load 70R power resistors (2172W), PFC is working properly, run continuously for more than 2 hours. My guess is excessive noise on the bus loaded with full-bridge output and interference UCC28070 to work, so a 3mh common mode inductance in series with the bus, the common mode inductors have a certain effect, when the grid voltage up to 181VAC full bridge full frequency noise components of the output noise to appear.

          I have some doubts that, regardless of the PFC stage load resistance or phase-shifted full-bridge, I found the PFC output noise are great, I use active high voltage probe connected to an oscilloscope to view the file exchange PFC output noise waveform as follows (2100W output ), a lot of noise, the grid frequency components close to the 20V, switching frequency noise component is also high, I'm sure the oscilloscope and probe attenuation ratio is right, I also refer to the PFC layout (PMP4259), while PF value, THDI is also good,



    ZhiHui Li

  • Hello Li

    I'll have a more detailed look at this tomorrow but in general it is difficult to accurately measure the noise on the output of a switched mode power supply. Can I suggest you try using a 'tip and barrel' technique for this measurement - it's described in in figure 3 - there are many other references to this method online.

    I would disconnect all the other 'scope probes from the PSU while doing this measurement.

  • Hello Colin

     I think you said that when the noise testing should try to ensure that the positive and negative probes as short as possible, and surrounded by the smallest, while the other channel oscilloscopes do not have a physical connection, I am here because the bus voltage measurement is 390VDC, so I can not probe direct connection, I use the bus noise active differential probe test may not be accurate. But these days I have been through the test, the problem seems to have been resolved:

    1, the bus have a lot of noise with differential probe, the solution is on the positive and negative of the bus connections Y capacitor 102 to the heat sink, full-bridge power output GND is connected to a Y capacitor 102 to the heat, the final bus noise only about 20V (active differential probe view, the main component of the grid frequency, a small amount of switching noise), now that this effect has been very good, I think the main reason is two topologies share the same sink while power input EMI filter Y-capacitors are also on the sink, in fact, I can not very precise analysis of this, if you can, I hope you can recommend relevant literature.

    2,When the grid input voltage drops to 190VAC, full load output full-bridge, full-bridge noise suddenly increases (100HZ, peak to peak around 4V, is the grid frequency), this problem, I do a lot of attempts, finally UCC28070 operating frequency from 32.5 KHZ up to 64KHZ, found that this issue is resolved, I understand that the PFC in 32.5KHZ, full bridge at 100KHZ, when the input line voltage decreases, overloaded output, PFC can not keep up the full-bridge load transient . In addition, PFC inductance inductance from 300uH original use, now use 400uH




  • Hello Li

    I was out of the office last week so I didn't get a chance to reply until now.

    It looks like you are making progress. There are many sources of information on noise reduction in Switched Mode Power Supplies - you could look at the document at as a starting point. Be aware of stray capacitances and the currents that can flow in them - the stray capacitance from MOSFET to heatsink is a good example. Grounding the heatsink - normally to the bulk capacitor 0V - provides a low impedance return path for the currents and should stop them flowing in the EMI filter. Internal capacitances between transformer primary and secondary also provide a path for high frequency common mode currents - a small Y cap from primary to secondary provides a return path.


  • Hello Colin

           thanks for the reply。

            I read the documentation you recommend , I also repeated studies of this document. thanks for your guidance!




    recommend you 

  • Thanks for the feedback and I'm glad to be of help. Don't hesitate to post on e2e if you have any other issues.