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UCC24630 transient problem at DCM to CCM

GaryC
Intellectual 2925 points

Snice the PWM controller can be worked on DCM  to CCM. So we try to ramp up the load from DCM to CCM and find the SR control will become unstable at this transient.

Ch1 PRi Vds, Ch2: Vpc, Ch3: Vsc, Ch4: SR Vgs


 

We list some question, and need your advice.

  • 1. What is max Vpc blanking time ? In spec, It's recommend 200nS to 1uS.

  • Could we increase > 1uS ?? What is max blanking time, Could we setting more?? What is side effect??

  • 2. SR MOSFET Turn on :

  • We want to confirm - SR MOSFET turn on need to meet both requirement :

  • Vpc > Vpcen and Vpcth whether Vpcen > Vpct or Vpcen < Vpcth.

  •  3. SR MOSFET turn off :

  • We find our power supply SR MOSFET Turn off suddenly, eg, There is 9 pulse SR MOSFET turn on 2uS,

  • But There is 1 pulse turn on 350nS, Periodically. 

  • What condition cause turn off this pulse other than Vsc > Vpc in ramp up control circuit?

  • 4. Turn ratio impact for SR short circuit issue.

  • In page16,It write " It is recommended that the transformer turns ratio be selected such that the secondary reflected voltage is < 0.85 of Vin(min) bulk capacitor voltage at the highest load when DCM operation occurs at the low line input condition.

  • What is recommend turn ratio of transformer suggest to avoid SR short circuit issue? Which turn ratio can reduce resonant damping.

  • 5. How can we control ramping slope of Vpc and Vsc?

  • 6. How to  avoid overlapping, When DCM change to CCM??

Gary

  • 0
    TI__Mastermind 31580 points
    Hi Gary,

    Are you support Pao and Daniel? If so can you please ask them to stop posting the same post multiple times? I will get the product apps engineer to look at the post.

    Thanks

    Peter
  • 0 in reply to Peter Meaney
    TI__Expert 4015 points

    •1. What is max Vpc blanking time ? In spec, It's recommend 200nS to 1uS. - 1us

    •Could we increase > 1uS ?? What is max blanking time, Could we setting more?? What is side effect?? - It's not possible to increase the blanking time beyond 1us

    •2. SR MOSFET Turn on :

    •We want to confirm - SR MOSFET turn on need to meet both requirement :

    •Vpc > Vpcen and Vpcth whether Vpcen > Vpct or Vpcen < Vpcth. - Vpc must be greater than Vpcen and Vpc-th for t > t_blk. Per section 7.3.2 The dynamic threshold has an active range from the minimum VVPCEN voltage to a maximum of 1 V clamp.

    • 3. SR MOSFET turn off :

    •We find our power supply SR MOSFET Turn off suddenly, eg, There is 9 pulse SR MOSFET turn on 2uS,

    •But There is 1 pulse turn on 350nS, Periodically.

    •What condition cause turn off this pulse other than Vsc > Vpc in ramp up control circuit? - I think what is happening here is that the ringing initially exceeds the threshold for slightly longer than the blanking time and this is interpreted by the IC as a short primary on time, which causes a short SR on time. This SR conduction sustains the ring voltage and causes further erroneous SR pulses. After a while one of the pulses is short enough not to exceed the blanking interval and the sequence stops.

    •4. Turn ratio impact for SR short circuit issue.

    •In page16,It write " It is recommended that the transformer turns ratio be selected such that the secondary reflected voltage is < 0.85 of Vin(min) bulk capacitor voltage at the highest load when DCM operation occurs at the low line input condition.

    •What is recommend turn ratio of transformer suggest to avoid SR short circuit issue? Which turn ratio can reduce resonant damping. - The damping factor is affected by the magnetizing inductance, the parasitic node capacitance and the parasitic winding resistance. It is not as such affected by the turns ratio. To avoid erroneous triggering choose the turns ratio according to N < ( Vbulk_min * 0.85 / Vout)

    •5. How can we control ramping slope of Vpc and Vsc? - The charge currents for the VPC and VSC ramps are determined by the voltage on the VPC and VSC pins respectively

    •6. How to  avoid overlapping, When DCM change to CCM?? Ensure that the period does not reduce by more than 500ns (min value) in a single cycle when entering or operating in CCM.

    Hope this helps.

    Thanks, Billy