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PMP4450 reference design Issue

Other Parts Discussed in Thread: PMP4450, UCC28703, UCC28730

Hi

We have a power supply to fail to pass the thermal test. This power supply is based on the PMP4450 (UCC28703) reference design from TI (it is built with exactly components with PMP4450).  During the test, when the environment temperature reaches to 85℃ with 250mA load, the 5VDC output will drop to around 0.8VDC.  (we have checked operating temperature of components on the board and all range are rated between -20 to 125 °C

Below are the test condition:

Input power:                            230VAC / 60Hz

Environment temperature       85℃

DC output:                              5VDC / 250 mA


Would please let me know if you have a solution for the issue.

Thank you

Anqun Wen

  • Hello Anqun,

    PMP4450 has an NTC thermistor (temperature sensor) which is designed to trigger Over-Temperature Protection shut down at about 86C. The board is working as designed. In order to keep the board running at temperatures above 85C you will have to defeat the OTP function. You can do this simply by disconnecting the NTC thermistor from pin 1 of U1, however that leaves the board without thermal protection. To raise the OTP threshold, a different NTC thermistor can be used which reaches ~10Kohm at a higher temperature.
    As an alternative, you can "fool" the NTC input by providing an offset bias current by adding a resistor from VDD (pin 2) to pin 1.

    The OTP threshold is about 1V, and the NTC resistance at 86C is ~10K, so the 100uA current out of pin 1 x 10K = 1V. To increase OTP to about 100C, the NTC value falls to about 5K which requires 200uA to hit the 1-V OTP threshold. An external resistor (Rxntc) can supply the additional 100uA needed. If VDD is 21V (for example), then the external Rxntc = (21V - 1V) / 100uA = 200K from pin 2 to pin 1.

    That should raise the OTP threshold to about 100C. Use the equation if your VDD level is something other than the 21V of the example calculation. Adjust for other OTP thresholds by targeting the NTC resistance at the desired temperature and providing the extra current needed to trigger OTP at 1 V. Be careful of the temperature rises of the other components once OTP has been shifted up, especially of the transformer.

    Regards,
    Uli Goerke
  • Hi Uli,

    It is the solution for my issue. Thank very much you for your help.

    Anqun
  • Hi Uli,

    We have another issue for the PMP4450 reference design, when the environment temperature is set to 0, the 5V output drop to around 0V (there is no any load), and the 5V output will resume to normal output after raising the environment temp to about 4. The temperature range (all components on the board) are between -20C to 125C. Would you please let me know if you knew the cause of this issue.

     

    Thank you for your help,

     

    Anqun Wen

  • Hi Anqun,

    I'm sorry that I don't have a ready answer for you on this issue. The UCC28703 controller is specified to operate down to -20C. At 0C, the NTC thermistor should have very high resistance and there should be no thermal shutdown due to this function/input.

    I can suggest 2 possibilities: a) mechanical connection failure at cold temperature (bad connection or cracked solder or cracked ceramic cap when contracting due to cold), or b) wide component value drift due to cold temperature. I have seen both situations in my experience, although not very often, and not easy to debug. Cracked caps can come from excess board-flex when handling the pcb, especially in the larger 1206 size.

    I suggest to monitor VDD on the UCC28730 and verify that the voltage stays above the 8.45-V maximum UVLO threshold. At no-load condition, the switching frequency is low and VDD usually drops. If the 1-uF ceramic cap used for VDD has a poor temperature characteristic (Z5U or similar), its value may have reduced too much when cold to keep VDD above UVLO. Please check that.

    If that is not the problem, you may have to search for another component that may be subject to possibilities "a" or "b" above.
    One idea is to re-solder each component lead to eliminate the bad-solder-joint possibility. And check each part's temperature characteristic to be sure its value and other properties remain stable at cold temperatures.

    Regards,
    Uli Goerke

  • Hi Uli,

    We have checked the components and connection (re-soldered components manually), our power supply still not working at -20C (the power supply will start working when temp raise above 0C), We have the demo board from TI, and it is working at -20C. However, there are a few of differences between our PCB layout and TI demo layout. Do you think that layout may cause a problem at low temp?

    Thank you,

    Anqun
  • Hi Anqun,

    It is hard for me to imagine that some layout differences can result in reduced operating temperature range, but that does not mean that it cannot happen.  Since this is the only correlation we have between the two boards, I have to think what might account for the 0C shutdown based on layout. 

    Increased noise comes to my mind, based on higher ESR in electrolytic capacitors when cold.  If switching noise is increased and the layout brings a noisy track near a sense-signal track (different than on the TI board), then it is possible that the increased noise at 0C is triggering one of the fault protections within the UCC28703 device. Assuming OTP is not one of them, this leaves OVP, OCP, UVLO, and input brownout.  I also assume the input is still at 230Vac test condition as in the start of this e2e stream, so input brown-out is discounted.  OCP has a 1.5V threshold, so I think it would be difficult to trigger this protection.

    You mentioned it is under a no-load condition, where the 5V may creep up in voltage a little. This could reduce the margin to the OVP threshold, so extra noise (due to cold) at the VS input (due to different pcb layout) could trigger OVP shutdown.  Alternatively, reduced VDD capacitance (due to cold, with wrong dielectric temp-co) may allow VDD voltage to sag to the UVLO threshold.  I know this is not a layout-related issue, but you did not report that VDD maintains margin when cold, so I want keep this possibility open until verified.  Or, the 5-V output continues to creep up to the OVP level because the on-board 1-K preload (~5 mA) is insufficient when the cold temperature reduces the leakage currents of the diode and output caps.  Try adding another 1-K resistor to the preload.  This also is not layout-related, but is another possibility that just came to mind.

    Regards,
    Uli