(specifications at bottom of post)
A problem concerning a flyback switcher using the UCC28631. If left alone for long enough, it will start up with no problem. If repowered, sometimes it will come up, sometimes it will not.
Monitoring Vdd on the switch side, it seems that if I repower the supply while the chip is in t_reset, it will cause the chip to low-power latch mode ("locked up" below). What is going on? What is causing the latch? How do I avoid it, or detect and clear it?
I have checked that I am meeting the constraints outlined in the datasheet:
Rcs/Lpri < Eqn 15 and Eqn 16
120u < Kline_adj < 350u, Eqn 17
Vcs_slopecomp < 30mV/us,, Eqn 51 [I think there is a typo in eqn 51, which I corrected. is that incorrect?]
10k < Rthevenin < 20k
Supply:
50W output offline/DC flyback switcher
Vin: 85-264Vac and 100-300Vdc; Vout: 12V@ 4.2A
Measurement taken at 125Vdc in, 0.5A CC active load output
Rp deviated from recommended 3.9k to 4.42k per this discussion thread and linear approximation of bench measurements
Cbulk=147uF
Lpri=275uH; ratio 13:2:2 Rcs=0.2R (values tweaked from calculated to meet stability criterion)
C_Vdd=20uF (problem still occurs at 10uF)
Ra=30.1k Rb=44.2k