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TPS62561DDCR Negative spike

Miteshkumar Dalabhai Patel
Intellectual 2320 points
Other Parts Discussed in Thread: TPS62561

Hi....

One of my customer is using TPS62561DDCR for 3.3V / 600mA output design. They have already consumed 30K devices but recently they received the cards from field & observate that in 4 to 5 boards TPS62561 device were damaged.

Switching node is showing short circuit with ground, i.e lower MOSFET seems damaged.

We probed the waveform & we observed the spike on switching node. By adding the snubber we are able to remove the +ve going spike but -ve spike are remains as it is.

Present layout is not good but it is not bad either. They have already made few changes to bring down the spike but after doing all the changes as per datasheet suggestions we haven't seen any improvement on -Ve spike.

Kindly find attachments of waveform & schematic.

-ve spike is around 900mV below ground & seems that it clearly violating the absolute maximum. Infect around the load current of 200mA spike is around -600mV & as the current increases up to 350mA it reaches to 900mV & after that upto 600mA output current it remains to 900mV.

Will this -ve spike creates any issue in longer run?

We need suugestions to improve on-ve going spike.

Regards,

Mitesh TPS62260 ISSUE schematic.pdf

  • 0
    TI__Guru*** 148640 points
    Please begin the tile of your post with the part number. As well, for several months now there have been no internal forums.

    Per this app note on the product page, this spike is ok: www.ti.com/.../slva494a.pdf The much more important item is the PCB layout.
  • 0 in reply to Chris Glaser
    TI__Intellectual 2320 points

    Thanks Chris.

    We have already asked customer to change the layout & placement of input & output capacitors very close to each other.

    Any idea why bottom MOSFET gets shorted? what could be the issue? Customer has already consumed more than 30K devices in recently received some 4 to 5 units from field in which TPS62561 has this issue & hence customer wants our feedback for improvement

    Regards,

    Mitesh

  • 0 in reply to Miteshkumar Dalabhai Patel
    TI__Guru*** 148640 points
    A bad layout is usually what causes a SW to GND short. You can post it here or email it to me to review.
  • 0 in reply to Chris Glaser
    Prodigy 20 points
    Hello Chris,

    The above issue is reported by my company and I am working on this.

    We have already tried by correcting the layout but no benefit was observed. Now, provide proper details, how the SW node getting short with GND pin due to bad layout. And what is the solution to avoid this without changing layout. Snubber circuit is already implemented.

    If no other solution available for the Ic failure then I can force to revise my all products PCB layout as per your recomendation. But after changing the layout what are the percentage of failure reduction? And is it sure that no failure occure after layout changes?
  • 0 in reply to Chris Glaser
    Prodigy 20 points
    Hello Chris,

    This issue is reported by my company and i'm working on it.

    We have already tried by correcting the layout but no benefit was observed. Now, provide detailed description, how the SW node getting short with GND pin. And what is the solution to avoid this without changing layout. Snubber circuit is already implemented.

    If its not possible then I can force to revise my all products layout as per your recomended layout. But, what is the percentage of failue reduction after layout changes? Is it sure that after layout changes failure will not observed in future?
  • 0 in reply to Nishit Patel
    TI__Guru*** 148640 points
    Hi Nishit,

    I recommend that you keep working with your local FAE, as they can best understand your situation.

    I don't believe that I have seen your PCB layout. But this is the most common cause of IC failure for a SMPS. It is usually not possible to correct a PCB layout manually on an existing design.

    Of course, there are other items that can cause a SMPS to fail, such as an over voltage on the input. Again, your local FAE is in the best position to understand your system design and help debug these items with you.