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UCC28703 (1-3) "Patent Pending Frequency Jitter Scheme to Ease EMI Compliance"

Other Parts Discussed in Thread: UCC28700

Is there a description of what this is, specifically?



  • Mark

    For the UCC28700/1/2/3 devices, the freq is dithered by +/-7.5 kHz, whilst the peak current demand is dithered in the opposite direction -/+3.5% to maintain roughly constant energy per cycle (I^2*f product) at Fsw ~ 100 kHz.

    The pattern followed is {Fnom, Ipknom}, {Fnom+7.5 kHz, Ipknom*96.5%}, {Fnom-7.5 kHz, Ipknom*103.5%}, {Fnom, Ipknom}, etc.

    The controller spends 4 switching cycles in each state before moving to the next. So at Fsw = 100 kHz, the dither pattern repeats every 120 us.

    I hope this answers your question, if so please click the "verify answer" button.