The abs max on the FLAGx output is 6.0V. This design would involve pulling this up to 7.0V through a 67K ohm resistor. This would result in a very current limited pull-up bias. This 1.0V above abs max would result in a worst case bias current of 15uA through the ESD diodes, and likely less because the conduction would probably be at a voltage above 6.0V. Is this OK?