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# UC1842/3/4/5 and UC2842/3/4/5 - actual minimum on time

Other Parts Discussed in Thread: UC2842, UC1842, TPS40210

Hi all

Would you mind if we ask UC1842/3/4/5 and UC2842/3/4/5?

How much is tON(min) Minimum pulse duration?
Of course, we recognize that the minimum duty is 0%(Dmin).
As our recgnition, it is possible to output Xns level or XXns level or XXXns level, isn't it?

On the other hand, please let us know TPS40210.
It shows tON(min) Minimum pulse duration=400ns.
We guess that the minimum duty of this device is over 1%(no 0%).
Is our recognition correct?

Kind regards,

Hirotaka Matsumoto

• Hi Matsumoto-san,

It should be possible to get duty cycles less than 5% on the UC2842 type devices.

You may have to post a new e2e post on the non-isolated fourm to get an answer on the TPS40210

Regards

Peter
• Peter san

We are sorry that we can not get it perfectly.
So we would like to confirm some points.

<First point>
It should be possible to get duty cycles less than 5% on the UC2842 type devices.
->Does "duty cycles" means DMIN Minimum duty cycle? And UC2842 is possible to get duty cycles(DMIN) less than 5%, right?

<Second point>
Are the others(UCx844/5) possible to get duty cycles less than 5% also?

Kind regatrds,

Hirotaka Matsumoto

• Hi Matsumoto-san,

I apologies as my response was not clear.

DMIN can be less than 5% on the UC284x type devices and on the UCx844/5.

Regards

Peter
• Peter san

OK, we got it.
That's why, is it possible to use DMIN with range 0～5% also?
(As an extreme example, between 1% and 0%.)

Kind regards,

Hirotaka Matsumoto

• Peter san

If you have the comment about my last post, could you let us know?

Kind regards,

Hirotaka Matsumoto

• Matsumoto-san,

It can be difficult to achieve duty cycles to very low levels lbetween 0 to 1% because of offesets in the PWM comparator and non ideal waveforms on the inputs to the PWM comparator.

For example if the ramp signal for voltage mode, VM control or the CS signal for current mode control, CM, has any distortion or non-linearity at these low duty cycles then the PWM comparator will not beable to produce a PWM duty cycle that varies from 0 to 1% without jitter.

Regards

Peter
• Matsumoto-san,
Are you intending to use this as an AC/DC buck or similar that uses small duty cycle? What are your input range, output voltage, output current requirements? With this information perhaps we could point you toward an existing reference design where we have already done this.
Regards,
John