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UC2843A: Ultra Low Duty Cycle and Rise- & Fall-Times

Part Number: UC2843A
Other Parts Discussed in Thread: UC2843, LMG5200

Hi all,

I'm working on an adjustable (0 - 60VDC with 0.1VDC steps) offline SMPS. The topology will be 2-sw forward and I'm planning to use UC2843 as the controller.

Since the output is adjustable and the minimum output voltage is 0.1VDC, the minimum duty cycle will be less than %0.1 (calculated from Np / Ns = Vi x D). So the minimum pulse width will be less than 10ns!

According to datasheet, rise- and fall-times for the output section are given as 50ns typical and 150ns maximum. For 10ns of pulse width, gate drive signal will be triangular (and of course will have lesser amplitude), so I think that the MOSFET cannot be driven properly. Am I right?

What should I do?

  • Hi Rohat,

    Thanks for your interest in the UC2843. Your application has a very demanding range of duty cycles and I dont think the UC2843 will be able to meet your requirement. I think you can already see the challenges with respect to the duty cycle and and rise and fall times.

    A two stage approach may offer better performance, using a buck converter on the output of a single stage ac/dc to step down the output voltage will give you more duty cycle range but you may still struggle to get good performance in terms of output voltage ripple and regulation at duty cycles less than 5%. If you can switch at lower switching frequencies then the time delays have less of an impact on the minimum duty cycle.

    The LMG5200 EVM is a 48V to 1V buck stage which operates at a low duty cycle, you may not need the efficiency or high switching frequency but the controller may be suitable for your application.

    Regards

    Peter