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TPS61072: Voltage regulation discontinuity - set-point shift with load.

Part Number: TPS61072
Other Parts Discussed in Thread: TPS61071

The TPS61072 variant of the TPS6107x family doesn't seem to be included in the more detailed documentation of the datasheet or app notes. I was asked to check out TPS61072 for conversion efficiency with ~1V input over a lower power range ~<100mW.

The first issue was inductor choice. The TPS61072 runs at half the conversion frequency of its counterparts, doubling ripple current.

From an efficiency point of view, a lower peak to average switch current ratio will generally work better. When average input current is not expected to go much over 100mA, the typical 400mAppk produced by recommended parts didn't seem to make much sense, nor did they produce very efficient results.

Which brings up the second issue larger inductance effects on chip behavior.

I could meet or exceed published efficiency behavior (for companion TPS61071) if the choke value was in the region of 33 to 120uH. However the larger choke values cause the output voltage regulation discontinuity (Fig 7 and 8 of the family data sheet) at much lower current/power levels. The voltage regulation discontinuity that is illustrated to occur above 100mA (>330mW) in the spec sheet figures is present in a 33uH circuit at 15mA (36mW).

There was also a stability issue - if you could call it that.

At loads near zero, with the 120uH choke (the most efficient, despite double turns and half copper x-section), the chip starts to, not so much oscillate, as go chaotic.
 Large (400mA 100uSec) reverse current surges develop, at a rep rate dependent on average load. The circuit doesn't snap out of this condition until the (2V4) load is increased above a 40mA/100mW level.

The larger choke also shifts the DC output set-point voltage from the nominal 2V4 produced with the 33uH choke, to a voltage that's ~45mV higher.

This voltage regulation discontinuity isn't explained or justified in the app notes. How and under what load-time constraints is the DC regulation loop altered internally? It must make transient loading a really curious sight, depending both on load transient amplitude and duration. There is also no suggestion that choke values or ripple current levels will modify DC voltage set-points. Is this part of the same internal circuitry?

There is some mention of feedforward capacitance that may be necessary if choke values are increased, to improve stability and transient response. Is this the chaotic condition that is being referred to? Won't the shifting DC set-point act as a chaotic 'attractor'?

Rob Legg

legg@magma.ca

  • Hi Legg
    sorry but fully understand your post. how do you get 400mAppk with TPS61072?
  • Jasper,

    I guess you don't.

    Seeing 160mA ppk, on the scope,  I just plugged in some numbers and transposed a 2 from numerator to denominator to get the scarier figure. At my current and power levels(<100mA input), the 160mAppk was scary enough.

    The efficiency improvements achieved with higher inductances were demonstrated in collected data.

    ve3ute.ca/.../170727_TPS61072_Mezzanine_Efficiency.pdf

    Where 400mA did show up, was in the reverse current period in the chaotic condition. Probably this etched the wrong number deeper into my consciousness.

    The set-point and regulation effects are illustrated in the following graph:

    The work was confirmed in a layout-compliant test bed.

    ve3ute.ca/.../170725_TPS61072_ Layout_Compliance_Coupon.pdf

  • Using the ~chaotic rep rate as  f_nocff  from eq 6 of SLVA289A, I applied a 1n0 feedforward cap, and larger choke values allowed efficiency measurements to be made. There was no change from the previous record, though no-load currents reduced by about 1mA.

    Load reg was also recorded, and it was noted that loads reducing generated voltage set-point shifts higher than with loads increasing. The unbroken rise in the previous example did not reoccur.


    I think this feature needs better documentation.


    RL

  • As suggested in the datasheet, the device is designed for 2.2uH to 10uH inductor. so it is really need to fully optimize the performance if you want to use much large inductance.

    i am curious about the reason you select TPS61072. because of the 600KHz FPWM operation?
  • Jasper,

    The app notes seem to concentrate on the three varieties that switch above 1MHz. Having been in the field for some time, I'd have thought that most of the hitches with these parts would be fairly commonly discussed. Without some idea of the internal workings of the IC, it's gain and internal compensation, external  compensation methods seem to be those of hit or miss - hits that may be illusory or misses that may involve sample destruction.

    This is assigned work for a low power application where efficiency is the primary concern. There appear to be updated documents that emphasize theTPS61070, or the other varieties that operate intermittently at lower power. I expect that they'll be searching far and wide for something that will suit the application, possibly employing completely different topologies.

    I've run other inductive boost iterations with different switch configurations indicating that when only power train losses were considered, it was possible to obtain conversion efficiencies exceeding 98% over a 5-50mW range with 1V input and 2V4 output. These numbers are more easily obtained at frequencies below 200KHz.. It was noted that drive power levels were also more impressive at the lower frequencies, 500uW being a not uncommon figure.

    The jump to higher conversion frequency in integrated power IC design seems to have ignored this possibly useful intermediate stage. If all that is needed is a reference, error amp/comparator, clock, FF and gating, It makes you wonder sometimes why simpler circuits are not made available in the push to miniaturization, lower power/voltage and improved efficiency.