This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LP5912: Power up Glitch

Part Number: LP5912


I am testing the LP5912-1.2V on my board and i see a power up glitch.

My design include a 10uF X7R capacitors at Vin and also at VOUT.

  See attached Pic ,

 How can I minimize this power up glitch? 

  • Hi Dov,

    Can you also include your Vin and Enable at the scope shot? Usually increasing the size your output cap will help smoothing your Vout ramp; For this particular device, you may also try to bring Vin first and set up a delay before you turn enable high which would help with the glitch as well.

    Regards,
    Jason Song
  • Hi Song,

    See attached scope pic with vin and enable ,

    You can see we have a delay from vin and enable (RC) this didn't help,

    I add additional 10uF on the output and I see improvement attached pic,

      

  • Hi Dov,

    Thanks for providing the screenshots. For your first scoopshot, the ramping of the enable pin seems to be very slower comparing to the Vin. I would suggest you to apply a sharp/fast ramp on enable pin and have a delay from Vin for at least 100uS. For the second plot, you did not include Vin and Enable on the Vout plot, I would suggest you to retake the first scopeshot with increased size of capacitor and see if Vout gets better.

    Regards,
    Jason
  • Hi Jason,

     

    See attached pic with increased capacitor from 10uF to 20uF also Enable with sharp ramping delay > 100uS from Vin ,

    As you can see the change in Enable ramping did not have significant effect on Vout .  

      

    Best Regards,

    Dov,

     

  • Hi Dov,

    Yes, I can see it has been improved but not dramatically. Will you try to have 2.2uF in parallel with a 10uF output cap and see if there is any improvement?

    Regards,
    Jason
  • Hi Jason,

    See pic with additional 2.2uF in parallel to 10uF output .

    I think the performance was better when add 10uF .

     

    Regards,

    Dov,

  • Hi Dov,

    Yes, I agree 20uF gave better performance. But will that satisfy your needs? Due to the nature of this device, it's difficult to completely get rid of the glitch. If it allows, you can try to put even big cap or try to have smaller cap in parallel. Like we discussed early, bring Vin before Enable will help as well.

    Regards,
    Jason Song