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BQ76930: ALARM set, SYS_STAT is all clear

Mike Evans
Prodigy 150 points
Part Number: BQ76930

I have 8 18650 cells in series, with a BQ76930 monitoring and an NXP micro talking over I2C. The I2C uses CRC.

I have good control of the device, I can read voltages, command balancing etc. 

Without sending the command to switch on the DSG FET I see the CC_READY bit being set, and I can clear this, and I have seen under voltages from flat cells so I know the SYS_STAT register is being reported correctly.

When I first command the DSG pin to activate, I see the pin go high then the ALARM line goes high and the DSG pin goes low.

There are no bits set in the SYS_STAT register. 

What can cause the ALARM pin to be set when the SYS_STAT register is all zeros? I can't find anything in the datasheet or on this forum.

Thanks,

Mike

PS The ALARM pin has a 510k pull down and it goes to a digital input of the NXP micro, which is configured with no pull-up or pull-downs.