Hi Thomas:
I have attached a draft design based upon the TPS23757PWR. You have previously reviewed my schematic and caught a few errors. I would greatly appreciate it if you could give the attached PCB design (ZIP file with PDFs) I have tried to follow the eval design approach where possible. My biggest concern is that I used grounded edge-couple differential pairs to route from the PHY chip to the transformer and from the transformer to the RJ45 jack. The PCB guidance in the data sheet was to remove ground under the POE transformer which I did somewhat because I needed a ground reference to maintain the 100 ohm differential impedance in and out of the transformer. Do you see this as a problem? If so what do you do in place? Just use edge-coupling without any ground reference? Possible but more area required?
Also, do you feel that my gate drive traces and handling of VSS and VDD pours are adequate?
Thank you in advance for your help. I will attach the schematic just in case it is helpful.
Best,
