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TPS40140: TPS40140 start-up timing questions

Part Number: TPS40140

Hello,

My customer has been using TPS40140 and has a timing problem with this devices. Here are a couple of questions related to TPS40140 to be clarify. Customer uses it in two phase mode.

1. VREG should be shut off when UVLO_CEx is pulled low, is this right?

2. What is the delay between VREG build-up and SS ramp-up? Is it a fixed time or a variable?  

3. Customer found the between VREG ramp-up and Soft-start ramp-up varies when TPS40140 is enabled before VREG drops to zero. Could anyone help explain why?

Thanks!

  • Hi Paull,

    1. VREG is off when both UVLO_CE1 and UVLO_CE2 are pulled low. If either UVLO_CE1 or UVLO_CE2 is high, VREG will be on.

    2. The delay time is not listed in the SPEC table. It may vary.

    3. How the delay time is measured? From "VREG reaches 5V" to "TRACK pin voltage starts to rise up from 0V"?
    Can you customer to provide some waveforms and send them to below email address?
     
     
     
    Thanks
    Qian