TPS54394: Problems about using power good pins and EN pins to achieve power up sequence management

Will Wang47

Part Number: TPS54394

Hi team,

My customer is using TPS54394 in their project to power up FPGA. They want to use power good pins and EN pins to achieve power up sequence management.

The schematic is as below. The red line is some debug changes.

Input voltage is 5V, Vout1 is 1.8V, Vout2 is 1V. Use PG2 to control EN1, R129 removed. PG2 is pull up to VREG5 through 4.7k resistor. PG1 left floating, R126 romeved. However the output is abnormal. PG2(Bule) and Vout AC coupled ripple(yellow) just as figure 2. The power good is not good now.

If I disconnect PG2 to EN1, and pull EN1 up through 4.7k resisitor, the output voltage has no ripple and PG2 out high.

I don't know what wrong with this schmatic. Could you give some comments? How should we use power good pins and EN pins to power up sequence management in TPS54394?

figure 1

figure 2

over 6 years ago

0 Vental Mao over 6 years ago

TI__Expert 5745 points

Try add a cap(0.1uF) in the PG2 to check the waveform(Vout2 PG2)

0 Will Wang47 over 6 years ago in reply to Vental Mao

TI__Expert 5470 points

Hi Vental,

Thanks for your reply. I think I get the right problem at last. As you cant see from the schematic, the customer add two magnetic beads after the input filter which should be avoided. Those two magnetic beads introduces great noise to this circuit. So it does not work normal.

0 Vental Mao over 6 years ago in reply to Will Wang47

TI__Expert 5745 points

Yes , may be. You need to add some caps(10uF+0.1uF) in another side of the bead to keep the Vin stable.

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TPS54394: Problems about using power good pins and EN pins to achieve power up sequence management