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TPS65279: TPS65279VRHH output delay 500ms after VIN enable

Star Xu
Genius 9645 points
Part Number: TPS65279

Hi

My customer has some query need help.

The issue is when using TPS65279VRHH power management IC on our development board.

We are using 12V as VIN, and expect is 1.8V for VOUT2 and 1.2V for VOUT1, which we currently using the resistor mode to configure these 2 outputs. .

According to our spec, we need VOUT ramp to 1.8V/1.2V within 25ms after VIN enabled. But actually we measured it took more than 600ms when VIN was enabled. Waveform is as below. Blue one is the VOUT 1.8V, which should be compared to 12V VIN but in below waveform the green one 3.3V is also OK for comparison as it has the same timing sequence with 12V VIN.

Please help check and feedback your suggestion.

thanks

Star

  • 0
    TI__Genius 9550 points
    Star,
    Root cause is C731 and C745. Remove them or change to 22pF, then test again.
  • 0 in reply to Jason Wang (BSR-MV)
    Prodigy 80 points
    Hi Jason,
    Thanks a lot, tried your advice and problem solved.
    Another question is we'd rather to use I2C to set different VOUT voltage than resistor mode. for example, we want to tune VOUT2 to 1.8V or 1.2V for different use cases. but we found every time VIN power off, the I2C register setting was lost, system re-start with the original resistor setting VOUT 1.8V.
    If it's due to the power loss of VIN/V7V ? If we separate the VIN and PVIN, for example, keep VIN always on at 5V, and switch PVIN on and off by SW controlled power cycle, the pre-setting in I2C registers can be remained?

    thanks
    Tina
  • 0 in reply to Tina Li
    TI__Genius 9550 points
    Tina,
    you are right. Register setting will be lost when V7V drop to 0V. If you want to keep V7V voltage, VIN should be higher than UVLO and at least one EN1/2 signal will be high.
    (only separate VIN and PVIN can't meet your design request)
  • 0 in reply to Tina Li
    TI__Genius 15135 points

    Hi, Tina

    Yes, you are right.

    When Vin power off, VIN UVLO will reset I2C register.

    And your workaround is correct, seperate VIN and PVIN, keep VIN >=4.5V, when PVIN on and off, the pre-setting in I2C registers can be remained.

  • 0 in reply to Zhao Ma
    Prodigy 80 points
    Good to know, thanks Zhao, Ma.
    I will let you know if it works after we tried on board. :)
  • 0 in reply to Tina Li
    TI__Genius 15135 points
    Hi, Tina

    Additional comment:
    Seperate VIN and PVIN, keep VIN >=4.5V, when switching PVIN on and off by SW controlled power cycle, we need to keep one of buck1/2 enabled at least, it means keep EN1=high or EN2=high or EN1=EN2=high.
  • 0 in reply to Zhao Ma
    Prodigy 80 points
    Hi,
    Any other ways to reduce the VOUT on time ? we want to get the minimum power on time according to datasheet which should be 94ns.
    Base on our sch design, what can we improve ? for example , dose increase switching frequency help ? or other factors need to consider ? thanks.
  • 0 in reply to Tina Li
    TI__Genius 15135 points
    Hi,

    The ON time = duty * Ts = Vo*Ts/Vin.
    So increasing Vin or reducing Ts can decrease ON time.
  • 0 in reply to Zhao Ma
    Prodigy 80 points
    Hi,
    Thanks for reply . Ts you mentioned is Tss in this equation, right ? cause I've tried this parameter, tuned Css from 10nF to 10pF, but On time was not reduced, we observed the actual on time is around 20ms.
    p,s our VIN is 12V, VOUT is 1.8V. please check above schematic for details.

    Tss(ms) =Css(nF)*(0.6V/6uA)

    Thanks,
    Tina
  • 0 in reply to Tina Li
    TI__Genius 15135 points

    Hi,

    No, the Ts is the switching period.

    I am confused with your questions, confirm with you:
    1. What is your purpose?
    2. you said "Actual on time is around 20ms" --> do you have waveforms?
    3. What is meaning of minimum power on time and VOUT on time?

  • 0 in reply to Zhao Ma
    Prodigy 80 points

    Hi,

    1, According to our power sequence, we need VOUT ramp up as fast as VIN applied. so we want to know on what condition it can be 94ns as datasheet said below :

     

    2, sorry, let me clarify, actually it should be 2.8ms ,not 20ms, we mis-measured previously . but still want to reduce this ramp up time. 

    3, please see the snapshot of datasheet in above item1.

    thanks, 

    Tina

  • 0 in reply to Tina Li
    TI__Genius 15135 points
    Hi,

    So your target is to reduce the startup time, right?
    1. suggest to reduce the SS cap, which will reduce the soft start time, you can try Css=4.7nF.
    2. I cannot see the snapshot.