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TPS65262-1: External start-up

Chris Chalmers
Prodigy 50 points
Part Number: TPS65262-1

I am using the TPS65262-1 to deliver the following voltages

Buck 1 = 12V input, 5V output

Buck 2 = 5V input, 3V3 output      (5V is supplied by output of buck 1)

Buck 3 = 5V input, 1V2 output      (5V is supplied by output of buck 1)

LDO 1 = 3V3 input, 1V8 output    (3V3 is supplied by output of buck 2)

LDO 2 = 5V input, 2V5 output      (5V is supplied by output of buck 1)

I have a 470nF cap on the soft start pin (SS1 pin 22).

The output of the buck 1 is monotonic and rises in 68ms.  I am finding that the output of Buck 2 is non-monotonic and hiccups twice before it 

 reaches full voltage of 3V3.  I have put this down to Buck 2 trying to fill up all its caps, probably going over current and hiccuping.  I have 

been trying to mitigate this by changing the power sequencing to push out the startup of 3V3 until the +5V input has reached its final 

 value and the other supplies are stable.  I then start up 3V3 (Buck 2).

  

I have attempted this by changing the power sequencing to manual (mode = 0V) and then adding a 1uF cap to EN3 and a 10uF cap to EN2.

When I do this I was expecting Buck 2 to come on last.  What I actually seem to see is that Buck 1 +5V and Buck 2 +3V3 come up together.

My question is about when the ENx signal actually switch on the Bucks.  In the datasheet it is not clear to me when the caps on the ENx signals 

 actual start getting charged.  Do they start getting charged from when the Vin of the chip rises and supplies the V7V reg or do they start from the Vin of the individual 

 buck? e.g.  When Buck 2 Vin starts to rise, the EN2 cap starts to get charged.

It seems to me that the ENx's start to charge as soon as VIN of Buck 1 is present.  By the time the soft start  of Buck 1 has passed then 

 the start up delay of Buck 2 and Buck 3 is over and they all start together.

Can anyone confirm?  Many Thanks.

  • 0
    TI__Genius 15135 points

    Hi, sir

    Could you send me the Buck2 is non-monotonic and hiccup waveforms?

    If the hiccup waiting time is ~14ms, i think IC trigger OCP, maybe it caused by big Cout, we should reduce Cout.

    If the hiccup waiting time is not ~14ms, i think the IC maybe trigger VIN UVLO, maybe it caused by bad Vin cap layout, the Vin cap is far away from Vin pin, we should place a cap(at least 10uF) closely to each VIN1/2/3 pin.

    Some comments:

    1. Could you send me the schematic for review?

    2. MODE is high or low?

    If MODE=low, 3 bucks is separately controlled by three enable pins, only if when EN pin voltage > 1.2V(typical), Vout will ramp up.

    If MODE=high, please refer the Automatic Power Sequencing in page17 of datasheet.

    3. In page 16&17 of datasheet (9.3.4 Power-Up Sequencing), there is a startup description and diagram, FYI.

    The EN charging current is changing when power on.  


     

  • 0 in reply to Zhao Ma
    Prodigy 50 points

    Thanks for your reply.

    I think I know what the issue is.

    The caps I were using were 1uF and 10uF.  When I switch the system off and then on again, the caps are still charged.

    This means the enables are 'on' from the start and this there is no delay in the supplies coming on.  When I discharge the caps I get 2 seconds delay 

     on buck 2 and 600ms on buck 3.  I have reduced the caps to 100nF and 220nF to delay the supplies by the appropriate amount

     and the hiccup timer is not triggered.

    Regards

    C  

  • 0 in reply to Chris Chalmers
    TI__Genius 15135 points
    Hi, sir

    Ok, i got you, and you are right, the EN pin don't have discharging when power down.

    BTW, SS cap=470nF is also too large, i think 10nF ~47nF is ok.