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LM5032: Why the free running Duty Cycle is 50%?

Part Number: LM5032
Other Parts Discussed in Thread: TIDA-00200

Dear Sir/Madam,

With the TIDA-00200 Reference Design, I am now testing the channel 1 of the LM5032 chip with the Channel 2 disabled purposely without the feedback loop (I just want to see how the LM5032 performs).

I applied a 1.3V voltage to the UVLO pin and a 7.7V voltage to the VCC pin. The RT pin is connected to a 86.6 kohm resistor to ground while the DCL pin is connected to a 200 kohm to ground as suggested by the TIDA-00200 design. I did not apply any voltage to the CS1 pin. I apply an external voltage source to the pin 2 of the Opto-Coupler (I did not solder the feedback Opamp of U3A to the board). When I adjust the voltage source connected to the pin2 of the Opto-Coupler, I can see the PWM signal's Duty Cycle at the OUT1 pin of LM5032 varying accordingly. However, the maximum duty cycle I can achieve is 50% no matter how I tune the magnitude of the voltage at the pin2 of the Opto-Coupler. 

I checked the datasheet of LM5032, it says as long as RDCL is larger than RT, the Max Duty Cycle should be 80%. As in my case, the Max D is 50%, is it because I did not apply any voltage to the CS1 pin? Can you please help me on this?

Thanks

Lin

  • Hi Lin Zhang85,

    Thanks for your interest in LM5032. The controller is based on current mode control and relies on current sense information as the ramp signal. This signal is needed for proper operation. Could you connect this pin to R11 as shown in the TIDA-00200 schematic? Do you have the rest of the schematic populated?

    Best Regards,
    Ben Lough