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LP87332D: Sync to Master Clock

Part Number: LP87332D
Other Parts Discussed in Thread: LP873220, AM5706, , LP8733-Q1, LP8732-Q1, TPS51200, TPS22965

Hello,

Is there a way to synchronize the LP87332D and LP873220 PMIC chips to a 2.048MHz master clock? This is for an AM5706 design.

Thanks!

Ryan B

  • Hi Ryan ,

    I have assigned your request to responsible Applications Engineer and we will get back to you as soon as possible.

    Regards,

    Murthy
  • Hi Ryan,

    Both devices have a CLKIN input.
  • The CLKIN/GPO output of the LP87332D is used as a gate for the PGOOD signal. In doc snvu577, is states in section 3 that:
    - PGOOD outputs of LP8733-Q1 and LP8732-Q1 are combined together with GPO2 of LP8733-Q1 to create the PWR_PORz signal. In the figure and in the DRA71x/DRA79x/TDA2E-17/AM570x EVM CPU Board, this is how it's configured. How can I use GPO on the LP87332D as a CLKIN if it's being used as an output to create the PWR_PORz signal - which goes to the PORZ input on the AM5706?
  • Hi David,

    Thank you for elaborating, I see now what mean.

    If CLKIN pins are changed to CLKIN by I2C, then they will no longer function as GPO2. Looking at the sequence in SNVU577, it may be possible to enable the TPS51200 with a Schmitt Trigger like SN74LVC1G17DCKR from LP873220_BUCK1 and PORZ could be generated with just LP873220_GPO since it seems to have the same timing with both EN pins shorted together. Note that I2C communication would be necessary to set the CLKIN_PIN_SEL bit in the CONFIG register after the OTP loads. 

    Our LP873x system expert will be back in the office on Tuesday and may be able to provide more insight or identify any risks with the above modifications. Would the benefits of using the pins as CLKIN be worth the extra effort to device a slightly different solution?

  • Hi David,

    The only way to change GPO2 to CLKIN is by I2C as Kevin said. So you could use the following signals to replace the GPO2 pins:

    PGOOD Gate: LP873220 GPO
    TPS51200 Enable: LP87332D GPO

    Since LP873220 GPO has the same timing as LP87332D GPO2, and both are open drain, you can just use this signal instead.
    And you could probably use LP87332D GPO to enable both the TPS22965 and the TPS51200 - you may double check your memory datasheet, but I expect the VTT can be enabled 2.5ms after the DDR VDD is enabled.

    Then both GPIO2/CLKIN are free to be configured as CLKIN and can sync to the 2MHz clock.

    Regards,
    Karl