UCC28951-Q1: UCC28951-Q1

Hi Jignesh

I didn't see this post before replying the other one you posted so my earlier comments may be a bit off the mark.

In Hiccup mode, the SS/EN pin voltage moves away from its 4.65 Clamp voltage as shown in Fig 42 of the datasheet. Please have a look at this pin. If it's clamped at 4.65V then the system is not in hiccup mode.

The cycle-by cycle current limit comparator operates only if the CS signal plus the RSUM ramp reaches 2V. This is described on P36 in section 7.3.11 of the datasheet. You are correct that the Cycle-by-Cycle current limit comparator is dominant over the PWM comparator but the cbc comparator is tripped only if the CS+Ramp signal reaches 2V

Please check the resistor at the RSUM pin and include the ramp it generates in your calculations. The added ramp is shown in Fig 37.
Please check the Tmin value you have set with the resistor at the TMIN pin.

Please re-post with your results and we can discuss further.

Regards
Colin

Hi Colin,
Thanks for the prompt reply.
I have shorted RSUM pin to GND and CS pin is already at 0V. So the sum of Rsum and CS is 0V. Still it is operating in hiccup mode. The signal at SS/EN pin is periodic ramp signal with 4.65 peak and then ramping down to 0.55V implying that the UCC is operating in hiccup mode.
RTmin is 100kohms.
Please let me know what could the reason for this. I also changed UCC28951 IC thinking it might be faulty but even the new one is showing the same results.

Regards,
Jignesh C. Patel

Hi Colin,
Instead of shorting, I have connected 10k resistor between Rsum and Gnd. Now the current limit is gone and UCC28951 is not going in hiccup mode. But I didnt understand the CS+Rsum voltage logic. Because now the voltage at Rsum pin is 2.47V still it is not in current limit. And even when we connect the Rsum pin to Vref, the system still should go in current limit if CS>2V. So, the controller should go in current limit only depending on the CS pin voltage.

Hi Colin,

I tested my circuit with power section. My input voltage is 120V and o/p is 24V in CV mode. I am using external error amplifier. R7 is open and Output voltage feedback is only used. Vdac is set point and Vo_adc is o/p voltage f/b. Ideally when these two values match, EA+ should go low and UCC should control it as CV mode.

Ea+= Vdac-Vo_adc ...(unity gain).

When I give Vdac =1.5 V and when Vo_adc = 0.7V, the system becomes unstable and magnetics start making noise and the unit enters in Desat protection. This happens aroung 0.8V @ comp pin. 

1. Should the opamp U45 be unity gain? (All its resistors are 10k making it unity gain differential amplifier).

2. Will the compensation loop values effect the basics controlling of the system? I tried changing it and calculating it based on the datasheet but there is no effect.

3. What will be Rsum effect?

4. When I remove the voltage feedback the system gives 30V uncontrolled o/p at 95V i/p. Transformer is 4:1. But when I connect the f/b, the system starts misbehaving as mentioned above i.e. at 35V i/p and 9-10V o/p the magnetics start making noise and then there is desat. The Gate, Drain waveforms are very noisy and unclear.

Also, after making R123, R53 = 0ohms, and when set value for output voltage is kept at 16V then the controller keeps duty cycle at max till 64V (4:1 transformer) and after that if i increase the input voltage the duty cycle should vary but instead it directly goes into burst mode with changing the phase shift between switching MOSFETs. The magnetics starts getting noisy thereafter.

Can you suggest why the duty cycle is directly going from Dmax to Tmin burst mode?

Please suggest what should be the circuit values for making this work. Please let me know the effect of Rsum and Comp pin voltage.

Thanks,

Jignesh C. Patel

Hello Jignesh

I'm not clear how your system is designed.

If Vo_ADC is the fully compensated feedback voltage - ie, it includes the correct loop compensation calculations to provide the typical 5kHz loop bandwidth. Then it should also include the error amplifier calculation - ie the difference between the measured output voltage and the target output voltage. In this case, U45 should be a gain of one and I don't see why there is the need for the VDAC reference voltage to be fed into U45.

If Vo_ADC is simply a scaled measurement of Vo then U45 will take the function of the error amplifier. In this case U45 should be configured as a high gain integrator with a bandwidth of about 5kHz (typically)

However, I'm not sure if any of the above explains the instability you are seeing so I would suggest the following

Disconnect both the current and voltage feedback amplifiers and feed a DC voltage onto EA+. This must be a low noise voltage - you can use a potential divider (10k for example) from VREF to GND to do this.

Slowly increase the input voltage to your PSU until the output voltage increases past the desired regulation setpoint - about 95Vin seems to give you about 30Vout when the PSU is running at Dmax. See if you can adjust Vout up and down by adjusting the potential divider.

The PSU should operate stably at any given setting of the potentiometer - if not then we need to look at potential noise sources in the layout. If it does operate stably then we need to look at the feedback system in more detail.

Please post a few waveforms - The voltage at the drain of the low side MOSFETs. The waveform at the CS pin of the controller. Ideally  4 or 5 switching cycles will give a good indication of potential noise issues.

Does the system operate stably when the TL431 analog controller is used to control the output ?

Please let me know how you get on.

Regards

Colin