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LM2842-Q1: LM2842 - On-Time Limitation on Duty Cycle

Part Number: LM2842-Q1
Other Parts Discussed in Thread: LM2842, LMR16006

Specific P/N of interest: LM2842XQMK/NOPB

I am trying to do a worst-case analysis for my intended implementation, but lack of information in the datasheet has led me to question the operation at high input voltage, as well as during light load.

Design criteria: 

  • Input voltage: 8V to 16V
  • Output voltage: 1.2V
  • Load current: 50mA to 500mA

The frequency for the X version is specified as 325kHz to 750kHz over temperature, and minimum on-time as up to 150ns.   Assuming 750kHz condition can overlap with the 150ns min on  time, that results in a minimum duty cycle of 11.25%.  Using the rough estimate of Vo/Vin as the duty cycle, the duty cycle would be required to go as low as 7.5% for my intended application.  

The datasheet for the LM2842 doesn't mention the behavior for pulse-skipping, light load, frequency foldback, or it's relation to minimum on-time.  

My specific question is: does the LM2842X employ any pulse skipping, burst mode, or similar to maintain output voltages when the Vfb is higher than the set point for multiple cycles?   Or does the minimum on-time actually dictate the buck range (minimum duty cycle) of this part? 

I'm also not sure if the minimum on-time and high end frequency range can even over-lap in the way I've described above because the datasheet doesn't provide the graphs of these parameters over temperature, etc.  Additionally, if there is no mitigating strategy for pumping up the output over the Vfb limit, then the light load operation could potentially cause the regulator to drift well above the set point if the ripple voltage isn't less than twice the light load value.  

I also tried to simulate the design with the Web-Bench tool and the spice model (using LTspice), but to no avail.  The web-bench tool fails to simulate any configuration, including their recommended values.  The spice model just behaves in a bizarre manner.