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LM2575: Large Variation in Ripple Voltage

Part Number: LM2575

Hello, 

We have been using the LM2575S-3.3 device in some of our designs for some time without issue. Normally we get a small ripple voltage of approximately 10-15mV (pk-pk). 

Recently we have had issue with parts coming from our manufacturer, some of the boards would exhibit much higher ripple voltage (70-100mV pk-pk). This has a large effect on our application since we use ADC's and use the 3.3V line as a reference. Through removing and swapping components one at a time we found the buck converter itself was the cause of this large variation. The ripple can be smoothed by a larger output capacitor, we normally use 330uF but smoothing the higher ripple buck converters takes about 800uF. 

We also did a batch test and found that while 70% of the devices coming from our manufacturer had this issue, none of the 10 devices we tested when purchased from a distributor had the issue. 

Is this likely to be a tolerance issue in the part? An increase of approximately 8 fold in ripple voltage seems an awful lot when all other factors are identical. Or have we been unlucky and gotten a faulty batch somehow?

The date/batch code on the 'faulty' devices are:

41AY9T0E3

  • Richard,

    Thanks for this thorough investigation. My first thought would be some instability caused by layout which may be amplified by tolerances in the IC. Can you send the layout as well as some scope shots of the switch node ("output" pin) and VOUT?

    In the meantime let me get in touch with my team to check on this.

    -Sam
  • Hi Sam, 

    This is the layout for the PCB:

    U100 - LM2575S-3.3

    C100 - Input Cap 100uF

    C102 - Output Cap 330uF

    D102 - Switching Diode 

    L100  - Inductor 330uH

    Below is the waveform for the output at 3.3V (AC only)

    Finally this is the output waveform for VOUT (DC):

    Best Regards,

    -Richard

  • Richard,

    Thanks for this info. I'm still leaning toward instability. What are the conditions of the second waveform? Can you share waveforms at full load, half-load, and no-load? And can you put SW/OUTPUT on channel 1 and VOUT on channel 2 so we can see the correlation?

    Please also attach your schematic so I can double check that as well.

    Thanks,
    -Sam
  • Hi Sam,

    Thanks for the responses so far. The condition of the second waveform given before was under partial load, at approximately 370mA output (load resistance 9 ohm). 

    I have attached side by side images of the system under the three different load conditions with output currents of 0.37A, 1A and 0A. I had to remove the TVS diode for the no load condition as it was getting an over voltage condition and shorting to ground. The top waveform shows the 3.3V output of the regulator circuit, the bottom waveform shows VOUT.

    0.37A - Note we were getting spikes showing up at the switching edges here, think its some sort of feedback through the oscilloscope but I wasn't able to remove it by changing the settings on the probes or scope. It only occurs when both the 3.3V output and VOUT are measured simultaneously. 

    1A

    0A

    Also this is the portion of the schematic dealing with the regulator circuit.

    Thanks and regards,

    -Richard

  • Richard,

    The switch waveform looks very unstable. Ideally you should have a continuous rectangular wave. This is an old part so I wouldn't be surprised with some duty cycle wobble but this is much more than I would expect.

    Do you see similar waveforms from the previous designs that had the acceptable ripple?

    -Sam
  • Hi Sam, 

    No I don't see any of the oscillation that I see on the units with the issue. Here is an attached image of a working unit. Had the spikes as before when both probes are connected, they don't occur when sampled individually. The working unit looks like a pretty perfect square wave to me.

    Best regards,

    -Richard

  • Richard,

    You're right, the working unit looks great.

    Can you confirm that swapping the IC on the same board will take this from working great to the instability we saw?

    -Sam
  • Hi Sam,

    Yes, swapping out the chips will instantly restore the instability. As part of the batch test I double checked by soldering on one of the original 'faulty' devices half way through the batch test and it performed the same way as originally with the high noise/ripple. 

    Best regards, 

    -Richard

  • Richard,

    Yeah, it looks like some process issue caused the part to go over the edge on stability with this board. I'd like to check to see if we can get this back under control with a few tests:

    1. Place the 100nF VIN cap directly across the VIN and GND pins. Right now the GND path is through the large vias and around the board to the thermal pad. It should help the part operate if this cap loop is small.
    2. If suggestion #1 doesn't change much, rotate C100 and connect the GND pads to those VIAs.
    3. Connect a flying wire from the FB pin to the output caps. This trace should be kept away from noisy traces and the layout doesn't show how FB connects to VOUT.
    4. Place more output capacitance, as you've done. Is the switch node more or less stable?

    -Sam
  • Hi Sam,

    Success! I tested points 1 & 2 but the changes had no effect, but the issue went away when I implemented point 3 and connected the feedback line more directly to the output capacitor. 

    I guess this is due to the route we are taking around with our 3.3V feedback line as it is going around the inductor and through an internal 3.3V plane. We will look to amend the layout in order to minimise this route and take a different path. 

    Thankyou for all the assistance.

    Best Regards,

    -Richard

  • Richard,

    Glad to hear we got to the bottom of it! Have a great day!

    -Sam
  • Hi Sam,

    Just a quick follow-up on this, we are going to be ordering a couple of PCB's with modifications, this (below) is where we would be moving the feedback route to (red line on the top layer). Would you have any other suggestions which would help improve the layout?

    Thanks and regards,

    -Richard

  • Richard,

    That FB trace looks good. You could route it up and around the SW/OUTPUT nodes a bit more since it's getting close to that noisy node.

    This is switching at ~50kHz so the layout does not have to be perfect. A few more thoughts:

    • You can move the diode and inductor closer to the IC to reduce parasitic inductance in that loop.
    • You can connect C103/4 to L100 with a shorter trace. Right now it has to travel a bit.

    -Sam