This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS53667EVM-769: phase margin at 1000Hz

Part Number: TPS53667EVM-769


Below is the bode plot of the EVM. The phase marge at 1000Hz is very small. Is this due to DCAP+ mode itself or due to the test instrument?


  • Hi Jerry,

    Phase Margin is only defined at the unity gain frequency. Since 1kHz is well within the loop bandwidth of the converter the phase at that point doesn't reflect the stability of the regulator at all. At 100kHz though when the gain crosses 0dB the phase margin is close to 90° showing the converter is definitely stable. The high phase margin at cross over can be attributed to D-CAP+ though which offers better performance than traditional current mode architectures.

    Let me know if you have any other questions.