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UCD3138: Fastest regulation possible

albrecht.guendel
Prodigy 50 points
Part Number: UCD3138

Hi,
I am looking for a high-bandwidth DC-DC step down converter solution. For this, switching frequencies in the multi-MHz range are necessary. The intended input voltage is 32V to 48V and the output voltage shall range from 12V to 24V. I need to provide a low impedance voltage supply up to 2MHz via high control loop bandwidth, above 2MHz, bypass capacitors kick in. Increasing bypass capacitors is not an option due to fast output voltage change requirements. (Dis-)charging large bypass caps is stupid

.
So far I have not found a PWM controller that could help with implementing such a DC-DC-converter; understandable, since switching 48V at maybe 6MHz is challenging. Unfortunately multiphase controllers are mostly optimized to provide very low output voltages so I havent found anything suitable either (also not from other companies).

Currently the UCD3138 seems promising – advertising 2MHz switching and 4 phase operation would hopefully suffice. But its 16MHz-sample-frequency fully digital control loop bothers me.
Not only is it unclear to me how one develops software and programs coefficient during initial testing without blowing up many many mosfets, but also how fast any implemented control loop could possibly be.

In the documentation it is said, that the corner-frequency of the sampled feedback voltage should be 1/10 of the ADC sample rate. I guess this recommendation comes from the assumption that one uses only a single pole filter and still want to achieve some image rejection; with a higher order filter one should get closer to the nyquist frequency of 8MHz.

I also ask myself, if the UCD3138 has 3 front ends, cant the 16MHz ADCs be interleaved and their outputs combined through the control loop nesting function? Would that give an effective higher sample rate?
My main concern is currently the control loop bandwidth as you can see – I currently see no option except trial-and-error to find practical boundaries.

My issue with trial-and-error is the “error”. It feels like a lot of hardware development and work with the tool chain and a learning curve for the chip-interface itself is ahead. If there is any experience out there, it would be greatly appreciated.
Also if you think that you found a (Multiphase-)PWM controller that I have missed, let me know.

Thanks for reading so far ^_^

  • 0
    TI__Mastermind 18370 points

    Eventhough the EADC in UCD3138 is a 16 MSPS ADC, you should not assume that it can sample and close the loop at 16 MHz.

    The PID digital filter in UCD3138 can run in intervals of 500 nS maximum. And that is what dictates the 2 MHz maximum switchng frequency in closed loop.

    I am not sure how accurate is the 1/10 of the ADC sample rate. I guess this is just a practical figure that was observed in previous design efforts.

    But even if 1/7 is the case, the expected band width will be 2MHz/7= 286 KHz.

  • 0 in reply to Yitzhak Bolurian
    Prodigy 50 points
    Hmmh. I so far thought the 16MHz came from 8 channels with 2MHz each, so i thought individual phases could be updated while other phases are still completing their cycle resulting in an overal faster response compared to run a single 2MHz phase.

    Well thanks anyway for the information; seems like i have to resort to a discrete and analog control loop.