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TPS43351-Q1: Could using spread spectrum stop a second TPS43351-Q1 from synchronizing its switching frequency?

Part Number: TPS43351-Q1

Dear TI, (but likely Gordon),

     In the same circuit used in my previous post, I have two TPS43351-Q1's. One is the master, with its SYNC pin connected to its VREG pin so that it's always in CCM. The Channel 2 low side gate drive output of the Master, pin GB2, is connected to the SYNC pin of the second TPS43351-Q1. They both operate, but their switching frequencies are not synchronized. I have footprints for an R-C low pass filter between GB2 of the Master and SYNC of the slave, but the GB2 waveform is quite clean. The Master has spread spectrum enabled. Could this be preventing the Slave's PLL from locking? I connected a 50% square wave with levels of 0 to 5V at 350 kHz to the Slave's SYNC pin and that worked perfectly. A second thing II'm wondering is whether the SYNC pin needs a 50% square wave - the GB2 output of the Master s not a 50% duty cycle.

Ch.1 = SW1 of Master, Ch.3 = GB2 pin of master and SYNC pin of slave, Ch.4 = SW1 of Slave

This plot shows that the rising edge of GB2/SYNC is not aligned with SW1 of the Slave, whereas they are aligned when the Slave is sync'd to a signal generator.



  • Hi Chris,

    I've assigned this to Gordon, but he's not in the office today, so you should get a response from him next week.

    From my understanding, the spread-spectrum shouldn't prevent the PLL from locking, since it's a pretty narrow variation range like 5%. More likely would be the duty cycle, especially if it's not a constant duty cycle. I don't think the duty cycle has to be exactly 50%, but a very low duty cycle, or a changing duty cycle, may cause the PLL not to lock.

    You could probably try this with your square wave, reducing the duty cycle until it doesn't lock anymore. If you see something like 30% duty cycle clock no longer synchronizing, that may be the issue.

  • Hi Karl,

         After a little more testing, I was able to determine that the two TPS43351's are sync'd, but that the differing spread spectrum (since both are pseudo-random) between the two was preventing my scope from showing them as such. When I disabled spread spectrum on the master, the slave TPS43351 sync'd up just fine. Then I set the slave to 280 kHz (master is 350 kHz) and re-enabled spread spectrum. Both units then ran at 350 kHz +-5% or so, and that for me is the definitive proof that they were synchronized.



  • Chris,

      I'm glad you figured it out. Just a few comments.

    If you are using the gate drive of one rail to drive the SYNC pin of the other TPS43351, be careful with the layout, as you are routing a trace with high voltage and current (gate drive) across your board. This could be a nasty radiator. If you have the RC filter close to the GB2 pin then you have reduced the potential for radiated emissions, however you have introduced extra capacitance on the gate drive. If the gate capacitance is to high, then you can cause shoot through. (slow turn off)

    From working with you in the past, you may have already worked this out, but I wanted to make you aware just in case.

    Note: The PLL is frequency based, meaning the PLL is locking onto the SYNC clock based on period. Check your corners to make sure the PLL can adapt fast enough and not cause drop out of the main clock.