UCD9090: Issue in configuring UCD9090 and UCD9244

First, please make sure the design follows below guideline.

http://www.ti.com/lit/ug/slvub50b/slvub50b.pdf

when you refer no outputs, i am assuming that all EN singals configured at UCD9090 are at LOW.

Do you check the MAIN_POWER_START input? it shall be high before UCD9090 can output HIGH at those EN signals.

Regards

Yihe

Dear Yihe

Thank you for your  response. All EN signals are low and MAIN_POWER_START is also low which is connected to TIVA Microcontroller.

Regards

Deepika

Dear Yihe

I am working with UCD9090 and UCD9244 for powering SoC TCI6638K2K. Its a dummy board with Stellaris LM3S2D93 Microcontroller/BMC  which is unflashed.As per the schematic, its observed that a MAIN_POWER_START signal is coming from pin PD0 which is GPIO pin of Microcontroller/BMC and it is connected to PWM1/GPI1 pin of UCD9090. The doubt is as follows:

1. For enabling UCD9090, is it required to flash BMC first so that it sends a high on MAIN_START_POWER signal which will turn on UCD9090, by means of which UCD9090 will provide output enable signals to UCD9244 and other regulators.

2. Is there a provision to enable UCD9090 without flashing BMC as we don't want to depend on BMC for powering up SoC.

Thank You

Deepika

Thanks for the updates. what you observed is right behavior.
If the power up sequencing is not up to the TIVA, modify the configuration to remove MAIN_START_POWER from Rail 1(VCC3V3_AUX) sequencing on dependencies.
Please follow this video training.ti.com/fusion-power-designer-set-rail-sequencing if you are not sure how to do it.
Regards
Yihe

For the rail 4(CVDD_POWER_OK). please remove SOC_POWER_START from its sequencing on dependencies.
Regards
Yihe

Thank you Yihe for your response

As you suggested, the dependency on  MAIN_START_POWER and SoC_POWER_START is removed. 2 regulators namely TPS73701 connected to UCD9090 namely to generate 1.2V and 2.5V are working fine.

But the regulators connected to UCD9244 are not operating.

Thank you

please make sure the PMBUS_CTRL signal on the UCD9244 is high. in the settings of UCD9244, the ON_OFF_CONFIG of the rails are set to CONTROL_PIN only and ACTIVE HIGH. so rails would not be on until PMBUS_CTRL signal is high.

Regards

Yihe

Thank you Yihe for your response

I am using UCD74120 to generate CVDD (1V) voltage for K2K SoC. On checking the voltage across the capacitor of value 220nF (as recommended in the datasheet) connected to BOOT pin of the same IC, it is expected that the output voltage across the same capacitor should be 1V, instead it is producing a voltage of 6V. This BOOT pin is connected to the SW pin of 74120 which is the output pin.

The schematic for the IC is same as that of the reference schematic.