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LP38690: SNS input resistance

Falk Alicke
Prodigy 170 points
Part Number: LP38690

Hi,

The LP38690 shows the SNS input stage to use an internal resistor divider R1/R2, but it does not spec the resistor values or input leakage. How large is the internal resistance R1+R2, and is there any other leakage spec? I am asking because my feedback loop is more complex forcing me to put a series resistor into the feedback, and I want to be sure that the external resistor is significantly smaller than the internal R1 + R2.

Thank you! Falk

  • 0
    TI__Guru 55940 points
    Hi Falk,

    Thank you for reaching out on E2E. LP38690 was originally released by National Semiconductor before the TI acquisition. While we would expect the resistors to be in the 10 k to 1 M range, please allow me some time to look into your question.

    In the meantime, could you help me understand the purpose/location of your series resistor? There may be additional ways to minimize the impact of the resistor depending on what its purpose is.

    Very Respectfully,
    Ryan
  • 0 in reply to Ryan Eslinger
    Prodigy 170 points

    Thank you Ryan. Yes, please see if you can get a response from the California team on the minimum resistance value that the LDO resistor network was designed for.

    The LDO output feeds a processor supply through an NMOS switch. We found that the switch causes a 50mV to 100mV drop. We'd like to correct the voltage using the feedback loop. Unfortunately we cannot simply connect the feedback input to the processor domain because when the switch is open, the voltage after the FET is 0V, and the LDO output would open up to VIN (6V) causing, which would violate the processor maximum voltage spec during turning the switch on. Therefore I plan using a diode between the LDO output and the feedback input to keep the maximum LDO output voltage at 3.3V + Vf[diode] while the FET switch is open. When the FET turns on, the processor voltage gets to the feedback input via a series resistor to close the feedback loop including the switch. That feedback resistor is now in series with the LDO internal resistor divider; The feedback resistor needs to be at least 100x smaller than the LDO internal resistance in order to limit the LDO output to exceed the target voltage by more than 1%. However, if the series resistor is too low, too much current will flow through the diode and resistor into the processor supply while the switch is open. 

    If you can think of a better way to solve this problem I'd like your suggestion.

    Much thanks. Falk

  • 0 in reply to Falk Alicke
    TI__Guru 55940 points
    Hi Falk,

    I apologize for the delay in response. R1 + R2 is typically 250 k.

    Very Respectfully,
    Ryan