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LM8342: Power sequencing

Part Number: LM8342

Hi, 

What are the power sequencing requirements for the LM8342? 

Ideally to simplify the sequencing requirements for my application, I would like to provide the VDD rail first and after some time apply the AVDD rail. Is this allowed or do both rails have to be applied at the same time?

Equally, will the LM8342 initialise the DC value from the EEPROM when the 3.3V rail is applied or does it need the AVDD rail present also to do this? I'm keen to avoid any delay in the VCOM output when the AVDD rail is applied. 

Many thanks

  • HI Pjs,

    I have notified our expert regarding this topic. Please expect a response by 10/25/18.

    Thanks,
    Aaron
  • Hello Pjs,

    Reviewing the datasheet, it appears that applying the VDD rail first and than AVDD should be o.k. and it also makes sense that eeprom contents will be loaded once VDD is valid and should not require AVDD to be active. AVDD is only shown as reference voltage for DAC in the block diagram. Unfortunately, this is an older device and an an EVM is not available at this time for me to verify this on the bench.
    Kind Regards,
    Liaqta