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LMZ21700: Can I connect Vos directly to my Vout power plane?

Part Number: LMZ21700
Other Parts Discussed in Thread: TPS82150

Hi,

Paragraph 10.1.2 (page 27) in the LMZ21700's data sheet says "Use a thin and short trace from the Vout terminal of the output capacitor to the VOS pin."  Both layout examples in Figure 81 and Figure 82 show this trace on Layer 3.

In my design, I'm using Layer 2 for my GND plane and Layer 3 for my Vout (Vcc = +3.3V) output power plane.  Can I simply connect the VOS pin directly to my power plane with a via, without a trace?

Thanks,

Doug

  • Hi Doug,

    Ideally having the trace will help reduce the noise that couples onto the VOS line. The power plane has the potential to couple surrounding noise on your system. The VOS pin is sensitive to noise and we have observed some issues with the regulator if not followed. In short the following recommendations should be accounted for:

    • Dedicated VOS trace for small inductance loop and lower chance to coupling noise
    • Adjacent layers should be GND to help shield/ "sandwich" the VOS trace from noise 

    If you need further help, you can send a snipping of your PCB layout (with all layers) so I can help review before manufacturing. 

    Regards,

    Jimmy 

  • Jimmy,

    Thanks for your reply.

    "Ideally having the trace will help reduce the noise that couples onto the VOS line. The power plane has the potential to couple surrounding noise on your system. The VOS pin is sensitive to noise and we have observed some issues with the regulator if not followed."

    I thought that might be the concern.  Here is a snipping of the top layer of my PCB layout.  Other than the vias, there's nothing to see on the other three layers.  The 2nd layer is my GND plane, the 3rd layer is my VCC plane, and the bottom layer is available for routing traces.  I've used a via to drop directly from the Vos pin down to the VCC layer, and it is 0.27" from there to the output capacitor (C19) via connection to the VCC plane.

    I suppose I could surround the Vos path on the VCC plane with cutouts, and I could also put a ground polygon on the bottom layer under the Vos path.

    What do you recommend?

    Regards,

    Doug

  • Doug,

    I'd like to reference the PCB layout example in the datasheet (Section 10.2.1.1) This is similar to your PCB layout with the exception that Layer 3 and Layer 4 are GND layers which helps further isolate the noise and "sandwich" the VOS signal. Putting ground cuttouts on Layer 3 VCC plane and putting a large ground polygon just around the LMZ21700 circuit should work. 

    Regards,

    Jimmy 

  • Jimmy,

    I don't think Eagle will let me put ground-potential cut-outs on the Layer 3 VCC plane layer. I can put traces on either side of the desired Vos path to provide electrical isolation, but the surrounding plane would still be at VCC potential. Would this be acceptable?

    What Vos path should I isolate--the path to the output capacitor's via (C19), or the path to the feedback resistor divider's via (R3)? Would it help to add another via in the Vout polygon, closer to the Vos pad, and isolate the Vos path to that instead?

    Are the Vos noise issues specific to this specific regulator? I was wondering if the switching currents in LMZ21700's chip inductor are inducing voltages in the surrounding copper, and if the orienting the Vos trace (path) perpendicular to its magnetic field might help.

    Regards,

    Doug
  • Doug,

    I believe that you can put traces on either side of Vos path for electrical isolation. If you can place a Vout via closer to the Vos pad that would definitely reduce the chance of noise coupling.The path between Vos to output capacitor is considered the "dedicated Vos trace" and should have further ground shielding and electrical isolation. The goal here is to create the smallest inductance loop between Vos and Vout. This is primary and isolation is secondary.

    The VOS noise issues , if  datasheet PCB layout recommendation not followed, are specific to the LMZ2170X family device. 

    Regards,

    Jimmy 

  • Jimmy,

    I can do as you suggest, but I wasn't aware of the Vos noise issue before, and now I'm a little concerned about meeting FCC emissions requirements.

    It's not too late for me to change to a different device, if I need to.  Does TI offer other switching buck regulators with an integrated inductor, where Vos noise is less of an issue?  Webench lists the TPS821X0 family as an option, but I don't know how it compares to the LMZ2170X family.

    Regards,

    Doug

  • Doug,

    Can you remind me what your application is and your initial condition requirements? I know your Vout is 3.3V.

    Regards,
    Jimmy
  • Jimmy,

    The application is data processing, Vin = 4V to 13.5V, Iout = 600mA. I looked at the TPS82150 that Webench suggested, and saw that it doesn't even have a Vos pin, so that would eliminate the Vos issue. From the simulations, I think the TPS82150 should work fine.

    Thanks very much for highlighting the LMZ21700's Vos issue for me--I'm very glad to learn about this in time to make a change.

    I'll send you a snippet of my TPS82150 layout in a few days, and maybe you could tell me what you think about that.

    Regards,

    Doug
  • Hi Doug,

    When you get the chance, please send me both schematic and PCB layout for review. You can contact me directly at j-hua@ti.com.

    Regards,
    Jimmy