This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TLV707: What is the expected behavior of the TLV707xx if VIN goes below VOUT

Part Number: TLV707


I have a customer planning to use the TLV70730 in an application.  However, there are times when his battery may dip below 3.0V say down to 2.8V.  He sees the output voltage follow the input voltage down with a slight drop.  Is it reasonable to say that in the condition of VIN<3.0V in the case of the TLV70730 that the TLV70730 will regulate to the input voltage minus the drop out voltage and this will work down to an input voltage of 2.0V?  Do we have any graphs or data for this condition?

Thanks for your feedback.

-Will Jarrett

  • Hi Jarrett,

    Dropout (Vdo) is the minimum headroom (Vin - Vout) required for the output to be in regulation.  Since linear regulators are not able to boost the voltage, as soon as Vin is less than Vout + Vdo, the output will not be regulated but rather you will be in the dropout region of the TLV707.  When in dropout, the pass FET is in the linear region of operation and output voltage will be a restive drop below the input voltage due to the Rds(on) of the FET.  PSRR and transient response are degraded in this region.

    While not for the 3 V output version of this family, the following curves from the datasheet show the behavior of the TLV707 family in dropout.  Due to the low output current in the curves it is difficult to see, but the red output rail is equal to Vin - Vdo after the output is enabled until Vin is high enough that the output is in regulation.  Regulation is achieved when Vin is greater than Vout(nom) + Vdo.

    Very Respectfully,


  • Ok. Perfect. This is what I would have expected. I apologize that I missed those graphs that do answer my question. Thank you,