Background
- We have used the TI TPS382 voltage monitor with watchdog timer successfully on a number of automotive embedded 8-bit controllers (MCU) since 2009 (5 volts).
- The original part # was: 2U3820-50QDBVRG4Q1
- The new AEC-Q100 # is: TPS3820-50QDBVRQ1
- On a recent project, cold weather testing at 5'C has revealed that 8 out of 16 MCUs don’t immediately come out of reset. Once the boards warm up from 30s to 90s, the reset line de-asserts and the MCU runs normally. No power cycle is involved to get reset to de-assert.
- The contention repeats 100% on all boards if soaked at -18'C for 1 hour.
- The original part has been used for several years and does not experience the cold issue.
- However, there has been an update to the Iso DC/DC power supple on the design...
The attached pdf outlines the circuits and experiments with measurements.
The contention can be solved if we change a series resistor on the WDI input from 27 to 1K.
Any help would greatly be appreciated!
ScottTP3820_ColdBoot_Issue1.pdfTP3820_ColdBoot_Issue1.pdf
Background
- We has been using the TI TPS382 voltage monitor with watchdog timer successfully on a number of automotive embedded 8-bit controllers (MCU) since 2009 (5 volts).
- The original part # was: 2U3820-50QDBVRG4Q1
- The new AEC-Q100 # is: TPS3820-50QDBVRQ1
- On a recent project, cold weather testing at 5'C has revealed that 8 out of 16 MCUs don’t immediately come out of reset. Once the boards warm up from 30s to 90s, the reset line de-asserts and the MCU run normally. No power cycle is involved to get reset to de-assert.
- The contention repeats 100% on all boards if soaked at -18'C for 1 hour.
- The original part has been used for several years and does not experience the cold issue.
- However, there has been an update to the Iso DC/DC power supply.
Watchdog Circuit
Experimental Setup
The above circuitry was instrumented using a Saleae Logic Pro 16 dual logic analyzer / analog scope.
The following signals were sampled at 125MHz digital and 3.125Mhz analog.
- V.05.D
- Digital 5V supply rail measured at jtag header 5.5mm from UF2
- PORESET#
- Global power on reset measured at jtag header
- Connects XC878 8-bit micro and Si8652BC-B-IS1 SciLab digital isolator enable line
- UF2.RESET
- Measured directly on TPS3820 pin
- UF2.WDI
- Measured directly on TPS3820 pin
The following table compares voltage readings for 3 experiments.
The "Pass" experiment illustrates a nominal boot at room temperature.
The "Fail" experiment uses the same board soaked for 1hr at -18'C.
The "Exp1 Pass" experiment changed RF0 from 27 to 1K (WDI series resistor).
All experiments have been repeated several times and are consistent.
All recordings show similar voltage readings and behavior.
Also if the TPS3820 is disconnected by removing RF2, the XC878 boots properly under all conditions .
Table 1, Voltage Readings
|
|
|
Pass |
Fail |
Exp1 Pass |
|
First Spike |
|
0.11ms |
0.13ms |
0.13ms |
|
|
V.05D |
0.75V |
0.78V |
0.77V |
|
|
PORESET# |
0.76V |
0.80V |
0.78V |
|
|
UF2.RESET |
0.62V |
0.67V |
0.66V |
|
|
UF2.WDI |
0.11V |
0.15V |
0.21V |
|
V.05D Stable |
|
0.63ms |
0.57ms |
0.62ms |
|
|
V.05D |
4.89V |
4.88V |
4.88V |
|
|
PORESET# |
0.67V |
0.66V |
0.42V |
|
|
UF2.RESET |
0.05V |
0.05V |
0.05V |
|
|
UF2.WDI |
1.90V |
2.11V |
2.05V |
Nominal Boot Sequence (Figures 1, 2 and 3)
- At 0.1091ms from power-on, a first spike can be seen in all signals (Figures 1, 2 and 3)
- V.05.D: 0.75V
- PORESET#: 0.76V
- UF2.RESET: 0.62V
- UF2.WDI: 0.11V
- At 0.625ms from power-on, V.05D stabilizes, RESET asserts low
- V.05.D: 4.89V
- PORESET#: 0.67V
- UF2.RESET: 0.05V
- UF2.WDI: 1.90V
- At 29.83ms from power-on, RESET asserts high
- V.05.D: 4.98V
- PORESET#: 5.07V
- UF2.RESET: 4.98V
- UF2.WDI: 1.95V
- At 49.34ms from power-on, WDI switches high signaling bootloader watchdog kicks
- UF2.WDI: 4.66V
- At 280ms from power on, WDI switches according to application normal watchdog kicks
Failed Boot Sequence (Figures 4, 5 and 6)
- At 0.1254ms from start, a first spike can be seen in (Figures 4, 5 and 6)
- V.05.D: 0.78V
- PORESET#: 0.80V
- UF2.RESET: 0.67V
- UF2.WDI: 0.15V
- At 0.57ms, V.05d stabilized
- V.05.D: 4.88V
- PORESET#: 0.66V
- UF2.RESET: 0.05V
- UF2.WDI: 2.11V
Experiment 1 RF0 = 1K
- Proper boot is achieved cold start with RF0 = 1K
Figure 1 Nominal Boot Warm
Figure 2 Nominal Boot Warm Zoom
Figure 3 Failed Boot Cold
Figure 4 Failed Boot Cold Zoom 1
Figure 5 Failed Boot Cold Zoom 2
Figure 6 Pass Cold Boot RF0 = 1K
Figure 7 Pass Cold Boot RF0 = 1K Zoom 1
Figure 8 Pass Cold Boot RF0 = 1K Zoom 2
