TLV62585: TLV62585 low dropout Mode

Hi Edward,

What are the operating conditions ( Vin, Vout and Iout ) when this stuck condition occurs? please take a scope plot showing this condition with Vin Vout and inductor curent.
Could describe the sequence of events just before you get into this condition?
What is the application? What is the 1.2V rail powering

The regulator is powering an Altera FPGA.   When we turn on the power, the regulator automatically goes into this mode.  There is no switching, the part seems to automatically turn on the upper MOSFET- we thought part was defective, but second part showed same results

VIN is 3.3V, Vout is 3V - Current is about 200 mA and FPGA is probably damaged from excessive core voltage

ED

This behaviour is not expected. The converter would enter LDO mode only when the input is close to the output.
could share a scope plot of VIn Vout and inductor current showing the start -up behavior when this issue occurs?

" When we turn on the power, the regulator automatically goes into this mode. There is no switching, the part seems to automatically turn on the upper MOSFET- "

could you also share the layout?

Edward,

I am closing this thread for now, please reopen it if you need further support