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TPS7A25: Soft Start and Overvoltage limits

Veerasamy Vasudevan
Intellectual 360 points
Part Number: TPS7A25
Other Parts Discussed in Thread: TPS799, TPS3700

Hi,

I am currently using TPS7A25 for 1.8V output generation from 5V line. 

The datasheet mentions that the device has Internal soft-start to limit inrush current. But I could not find the time it takes the output to settle to final value (ramp up time)?

Also does the PG signal goes Low and device is turned Off when the output goes beyond ,say 10% or 15% above the desired Output Voltage. If not, can you suggest any regulator which has this Overvoltage shutdown feature? My Load requirement is 250mA and I need EN and PG features as well.

Regards,

Veerasamy

  • 0
    TI__Guru 55940 points

    Hi Veerasamy,

    Thank you for your interest in this device!  Currently the datasheet is not in its final form but rather contains advanced information as we have not fully released the TPS7A25 family yet.  The devices you have are preproduction samples.  As such we do not currently have any typical characteristic curves in the datasheet yet.  Below are two startup curves showing that can give you an indication of how long it will take for this family to startup.  The first curve has Ven tied to Vin.

    I am not aware of an LDO that will latch off the output when there is an overvoltage on the output caused by a transient or bias on the output during operation.  Keep in mind that traditional LDOs will not sink current but will rather turn off the pass FET when the output voltage is too high until the load can pull the output back to the regulated voltage.  A few exceptions are TPS799 which has an internal pulldown circuit to help pull down the output voltage during an overshoot and TPS7B7701 which will detect if the output voltage is too high relative to the input voltage.

    In order to achieve your required operation, a voltage supervisor such as TPS3700 could be used to detect an overshoot.  OUTB of TPS3700 can be tied to the EN pin along with your normal enable signal.  When the output rises above your set overvoltage threshold, OUTB will disable the LDO output which will also cause PG to transition to logic low.

    Very Respectfully,

    Ryan