UCC28633: UCC28633

Hello Keshab,

Thank you for your interest in the UCC28633 Flyback controller.

Looking over your schematic diagram I see that the primary clamp diode D2 is connected backwards.
The anode of D2 should be connected to “DC-HV+”. As it is shown now, both D2 and D6 place R1 across the primary winding which acts as another load and could be preventing sufficiency energy to maintain the voltage on VDD cap C5.

The diode used for Aux winding (D8) is shown as FR107 which is has a reverse-recovery time (trr) rating of 500ns. This is an obsolete part and D8 actually should be an ultrafast part, such as ES1D from Diodes, Inc. (or its axial equivalent). Similarly, the primary clamp blocking diode D6 is an FR257, which also is too slow for high frequency operation. Please select diodes with trr rating of <50ns or better.
Similarly, output diode D5 should also have a trr rating of <50ns.

Finally, the value of R1 = 1K seems to be too high, even if D2 is connected properly. Postulating that the peak primary current (Ipp) might be 1A, then the leakage inductance would force 1A through R1 and generate a 1000-V spike on the drain of Q1 each cycle. Even if Ipp is only 0.5A, it would be a 500-V spike, not counting the TVS voltage of D2. I suggest to short out R1 (zero ohm) during debug time. You can install a low value (10, 20, etc . ohms) later, only if necessary to help reduce ringing for EMI reduction.

Regards,
Ulrich

No changes, after rectifying above suggestion. same starting problem still remain.