CSD86330Q3D: Test Setup Used in Measuring the Datasheet Electrical Characteristics

Elisha Tarroza71

Part Number: CSD86330Q3D

Hello,

Is it possible to request for the test setup used in measuring the electrical characteristics of CSD86330Q3D? A customer will be using this part for military application, and they want to expose it to radiation then characterize it afterward.

There is indeed a column for the test conditions, however, we see no mention of the TGR setting. Was this pin kept open, connected to ground, or to another pin when the electrical characteristics were measured?

Thanks,
Elisha

over 5 years ago

0 John Wallace1 over 5 years ago

TI__Mastermind 34005 points

Hi Elisha,
Thanks for the question. TGR (top gate return) is internally connected to VSW (switch node) with a bond wire. It is there to provide a low inductance return path to the gate driver IC and has very little current capability. It may be left open for low current/non-switching measurements. On resistance of the FETs is made from VIN-to-VSW (top FET) and VSW-to-PGND (bottom) FET. Power loss and efficiency measurements are made with TGR connected to the SW pin on the gate driver IC.

0 Elisha Tarroza71 over 5 years ago in reply to John Wallace1

TI__Expert 3700 points

Thanks, John!

Because of the holidays, TI E2E™ design support forum responses will be delayed from Dec. 25 through Jan. 2. Thank you for your patience.

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CSD86330Q3D: Test Setup Used in Measuring the Datasheet Electrical Characteristics