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TPS63020-Q1: Design review request; design tests fine on bench but fails during use in the field

Joseph Chiu
Prodigy 130 points
Part Number: TPS63020-Q1
Other Parts Discussed in Thread: TPS63020

Hello,

I have a design that uses two TPS63020's to generate 5V and 3.3V.  The units seem to test out fine when I build and bench test them; but my client has had several units "spontaneously" fail in the field under different set of circumstances, but in all cases the TPS63020 has failed with the device "getting hot".  I am in the process of recalling the failed units for analysis.  In the meanwhile, I would like to tee up a review of the design.

The 5V section schematic is as follows (the 3.3V is the same except for the feedback ratio):

The load is not particularly demanding -- in most cases, well below 100 mA -- but the design in intended to allow for up to 1A.

Looking at the layout, I see that I could fatten up the inductor and output traces a bit (and also straighten the exit path out of the Vout pins), but pretty much everything is a short distance to the regulator.  Not shown in the schematic clipping above, but visible in the layout is a 10uF ceramic cap on the input Reg-In rail.

In the very first version of the product, we had the possibility of Vin exceeding 7 volts under certain conditions. However, we put a clamp on the input side to limit that to 6.5V or less.  When the regulator is enabled, the input rails will drop to the nominal 3.7V (battery) or 5V (USB) depending on what power source is connected.

There is also a possibility that a inductive load may be kicking back excessive voltage to the output rail.  That is still being investigated.

Thank in advance for your help on this!

  • 0
    Prodigy 30 points

    In the very first version of the product, we had the possibility of Vin exceeding 7 volts under certain conditions. However, we put a clamp on the input side to limit that to 6.5V or less.  When the regulator is enabled, the input rails will drop to the nominal 3.7V (battery) or 5V (USB) depending on what power source is connected.

  • 0 in reply to user5078703
    TI__Mastermind 20900 points

    Hello Joseph,

    voltages above the absolute max spec can severely damage the device. Please keep the input/output voltages inside the recommended operating conditions (<5.5V).

    In addition to your good layout optimizations it is recommended to move the input cap closer to the device input. Also i would place an additional cap so that you have one for each converter.

    Do you have a more detailed failure description?

    Regards,

    Julian

  • 0
    TI__Mastermind 21565 points

    Hi Joseph:

    May you supply the waveform of the Vin, Vout and L1,L2? So that we could check if the voltage spike is exceeded the limitation.

    Beside, the layout is not good enough. For example, the input capacitor, output capacitor, and the inductor should be placed as close as possible to the IC. Please follow the layout guidance carefully to achieve good performance.

  • 0 in reply to Minqiu Xie
    Prodigy 130 points

    Thanks Julian and Minqiu Xie.

    The >7V condition was only on the initial prototype which are no longer in existence.  All units now have a clamp to limit input rail to 6.5V -- in normal operation, the input rail should not go much above 5V (USB powered).  My current understanding is that these units were not operating in the mode that would have had them at that higher limit (still working on confirmation on this with the client).

    I agree that the traces could be fattened up and the input cap brought closer (and add a second one for the second converter).  

    Distance wise, I think most of the components are placed at comparable distance to the layout example in the datasheet?  

    Should the feedback tap happen "after" the output caps as in the datasheet example?

    Once I get the units back from the customer, I will work on those measurements.

    Thank you.

  • 0 in reply to Joseph Chiu
    TI__Mastermind 21565 points

    Hi Joseph:

    Thanks for your supplements. The input capacitor, output capacitor, and the inductance should be placed as close as possible to the IC.

    Let do deeper analysis after your test.

    Considering from the forum's maintain, I'll close this post temporary. When you complete the test, just reply below or open a new post. Thanks for your understanding!