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TPS7A52-Q1: LDO regulating with load to a higher Output voltage than configured

Part Number: TPS7A52-Q1

Hi,

using the TPS7A52-Q1 to have a stable 1,95V voltage at the Output. Supply it with stable 5V from another LDO.

On my first PCB where I designed it on I see that it is quite often showing the correct 1,95V (without load). Sometimes I see when making Tests with Multimeter/Oszi that the Output Shows more than the 1,96V (2...2,5V) and going then down to the 1,95V.

With a load (another digital device which Needs 1,95V) I see that it is going up to 2,59V?! (stable).

I dont know why.

Here is the schematic:

Does anybody have an idea whats Happening here?

Thanks,

Markus

  • Hi Markus,

    Generally when the output of a linear regulator is higher than the intended set voltage it is due to an unintentional leakage path that is biasing the output voltage high.  When the output of a traditional linear regulator is biased higher than the intended set voltage, it is up to the load to pull the output voltage back within regulation. Common leakage paths include residual flux that is not properly removed after soldering and for applications with loads which require multiple input rails, there can be diodes internal to the load which can bias the output high. 

    In your application it would be good to also confirm that no current is flowing through J3 when you are intending the output to be 1.95 V since current flowing through this node would allow the voltage setting to increase..

    Very Respectfully,

    Ryan

  • Hi Ryan,

    thanks for your Feedback!

    I made several Tests and have seen that some of my PCBs showing Shorts between Pins at the IC where the 1,95V should be. So there is forcing another voltage pack to the LDO.

    But have seen also sometimes with one of our multimeter that the voltage is at the beginning higher then the 1,95V and afraid that the LDO is fighting with the load Change.

    In General - the LDO is for a quite high current I know. But is the Vout also guaranted without load or with a very small load with several hundred uA? Or is that in General a Problem for such LDO to struggle without loading / no current at the Output flowing?

    Thanks,

    Markus

  • Hi Markus,

    The Output Voltage is specified for output currents from 5 mA to 2 A; however, it is important to note that when the output is biased high, the feedback loop for the LDO will turn off the pass element so that additional current will not flow from IN to OUT and charge the output capacitor(s) further.  It is up to the load current (or resistor divider current when no load is present) to pull the output back within regulation.  If your bias on the output is stronger than the load current (resistor divider current), you may still see a higher output voltage than intended.

    Very Respectfully,

    Ryan

  • Hi Ryan,

    ok, noted. So should I load the Output of the LDO resistive to get a Minimum current of 5mA? Cause my load itself (another IC) is normally under the 5mA.

    Best regards,

    Markus

  • Hi Markus,

    In order for the Electrical Characteristics table Accuracy specifications to apply, yes a minimum load current of 5 mA would be required.  Keep in mind that your resistor divider current will contribute to this current.

    It is important to keep in mind that TPS7A52-Q1 will be able to achieve a stable regulated output even with no load.  From your previous description it sounds like most of your issues are caused by the unintentional bias on the output.

    Very Respectfully,

    Ryan