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LM5021-Q1: will not startup

Keith Johnson3
Prodigy 90 points
Part Number: LM5021-Q1
Other Parts Discussed in Thread: LM5021

I'm using the LM5021 for the first time and I connected it as seen below. I not add the power plant yet, I just want to being the IC up. My thought were that once the IC was powered passed the UVL voltage that I should see at a minimum of 8V on the Vcc pin. Is this not the case? What is the minimum configuration to start up the chip?

KCJ

LM5021 Question 1.docx

  • 0
    TI__Expert 8210 points

    Keith

    The bias power is being applied to the VIN pin, not the VCC pin.  In the electrical characteristics, there is a separate line for VVIN_EN VCC Regulator enable threshold, where the typical value is 20V.  For a proper design we recommend you design to the abs max value of 23V.

    To start up the LM5021 IC you need to apply a minimum voltage of at least 20V typ (23V abs max) to get it to start up.

    Best Regards,

    Eric

  • 0 in reply to Eric Faraci
    Prodigy 90 points

    From my  understanding of the IC is that once the startup voltage is reached the Vcc regulator become enabled too. I should measure 8 or 9 volts. I'm not see this voltage and once I reach 22 volt the Vin voltage drops to 7V. Is this what I should measure?

  • 0 in reply to Keith Johnson3
    TI__Expert 8210 points

    Keith

    What you are measuring is expected.

    In the electrical characteristics, VVCC VCC regulated output specifies that VCC will regulate between 8V to 9V, with a nominal voltage of 8.5V, when there is no external load.  IVCC_LIM VCC regulator current limit specifies that the absolute minimum current limit that VCC pin can provide is 15mA, and at this test condition VCC is reduced to 7.5V.

    In your circuit it shows that you have an LDO to a 5.0V rail off of VCC.  What is happening is that this circuit is loading VCC, which is causing VCC to decrease in voltage.  As long as you stay under the 15mA abs min limit for this pin there should be no issues with your design.

    Best Regards,

    Eric

  • 0 in reply to Eric Faraci
    Prodigy 90 points

    Thanks, I powered the LM5021-1  with 7.15V and was able to get switching at the frequency I desired (100KHz) and sorry I didn't send the correct schematic in last message. I've attached a power point with the current circuit and plots,LM5021-1 reguation isses 1.pptx. please see attached:

  • 0 in reply to Keith Johnson3
    TI__Expert 8210 points

    Keith

    I assume you are asking for help to understand what is going wrong with your design.  From the waveforms you show the drain voltage on the FET increases when the gate is still on and the current plateaus.  This could be caused by the FET saturating, which is not supposed to happen in a switched mode power supply.  I recommend that you verify that your power stage design is correct and it's assembled properly, especially the FET.

    Best Regards,

    Eric