Other Parts Discussed in Thread: DM3730, SYSCONFIG
We meet a sound problem on LogicPD's SOM DM3730 with CODEC TPS65950. It has a sound bug during pilot test: our device sound outpu becomes abnormal occasionally. Noise will not automatically dissapear until tune off the power. If you repeatedly turn on and off the power about 1/30 chance the abnormal noise will come again.
We cut off the back stage and tested the TPS65950 output wave form when device play a 500Hz sine sound file.
Figure 1 abnormal sound wave
While the normal wave on other device is bellowing, no high frequency noise.
Figure 2 . normal wave
Then we use logic analyzer sampled the I2S data in TP2 and found when sound abnormal , data is ok!
Figure 3 data collected from I2S when audio abnormal
We collecected the audio wave and do FFT in Matlab to find the noise freq is about 7KHz
Figure 4 FFT result when sound abnormal
Also we can compare the normal one, no 7K componets:
Figure 5 FFT result when normal, only 500Hz and it's hamonical components.
In order to locate the problem, we have tried 2 changes by software modification. one is change the audio sorce sample rate from 8K to 16K. Then the occasion sound abnormal became always abnormal. We assume there may be some registers configure wrong. But we check it is by read back all the regs value it is the same with another normal device.
Another try is add a manually reset button to reconfigure all the regs when sound abnormal. And it works. Then SW engnieer printed out registers both abnormal and normal, then we found they are the same:
mcbsp clock config:
1. CM_FCLKEN_PER,address:48005000,value:7ffff
2. CM_ICLKEN_PER,address:48005010,value:7ffff
3. CONTROL_DEVCONF0,address:48002274,value:5000040
4. MCBSP2_PCR0_REG,address:49022048,value:f
5. MCBSP2_SRGR2_REG,address:49022028,value:301f
6. CM_IDLEST_PER,address:48005020,value:0
7. MCBSP2_SPCR1_REG,address:49022014,value:0
8. MCBSP2_SPCR2_REG,address:49022010,value:207
9. MCBSP2_XCR1_REG,address:49022024,value:40
10. MCBSP2_IRQSTATUS_REG,address:490220a0,value:4f02
11. MCBSP2_XCR2_REG,address:49022020,value:8041
12. MCBSP2_RCR1_REG,address:4902201c,value:40
13. MCBSP2_RCR2_REG,address:49022018,value:8041
14. MCBSP2_SRGR1_REG,address:4902202c,value:fff
15. MCBSP2_MCR1_REG,address:49022034,value:0
16. MCBSP2_MCR2_REG,address:49022030,value:0
17. MCBSP2_RCERA_REG,address:49022038,value:0
18. MCBSP2_RCERB_REG,address:4902203c,value:0
19. MCBSP2_XCERA_REG,address:49022040,value:0
20. MCBSP2_XCERB_REG,address:49022044,value:0
21. MCBSP2_REV_REG,address:4902207c,value:23
22. MCBSP2_RINTCLR_REG,address:49022080,value:0
23. MCBSP2_XINTCLR_REG,address:49022084,value:0
24. MCBSP2_ROVFLCLR_REG,address:49022088,value:0
25. MCBSP2_SYSCONFIG_REG,address:4902208c,value:0
26. MCBSP2_THRSH2_REG,address:49022090,value:0
27. MCBSP2_THRSH1_REG,address:49022094,value:0
28. MCBSP2_IRQENABLE_REG,address:490220a4,value:0
29. MCBSP2_WAKEUPEN_REG,address:490220a8,value:0
30. MCBSP2_XCCR_REG,address:490220ac,value:0
31. MCBSP2_RCCR_REG,address:490220b0,value:0
32. MCBSP2_XBUFFSTAT_REG,address:490220b4,value:305
33. MCBSP2_RBUFFSTAT_REG,address:490220b8,value:0
codec config:
1. TRITON2_ATXL1PGA_OFFSET,address:a,value:0
2. TRITON2_ATXR1PGA_OFFSET,address:b,value:0
3. TRITON2_ARXR1PGA_OFFSET,address:10,value:3f
4. TRITON2_ARXL1PGA_OFFSET,address:11,value:3f
5. TRITON2_ARXR2PGA_OFFSET,address:12,value:3f
6. TRITON2_ARXL2PGA_OFFSET,address:13,value:3f
7. TRITON2_AVTXL2PGA_OFFSET,address:c,value:0
8. TRITON2_AVTXR2PGA_OFFSET,address:d,value:0
9. TRITON2_VRXPGA_OFFSET,address:14,value:0
10. TRITON2_ARXL1_APGA_CTL_OFFSET,address:19,value:b
11. TRITON2_ARXR1_APGA_CTL_OFFSET,address:1a,value:b
12. TRITON2_ARXL2_APGA_CTL_OFFSET,address:1b,value:b
13. TRITON2_ARXR2_APGA_CTL_OFFSET,address:1c,value:b
14. TRITON2_BTPGA_OFFSET,address:1f,value:0
15. TRITON2_ALC_CTL_OFFSET,address:2b,value:0
16. TRITON2_DTMF_FREQSEL_OFFSET,address:30,value:0
17. TRITON2_DTMF_TONOFF_OFFSET,address:35,value:0
18. TRITON2_DTMF_WANONOFF_OFFSET,address:36,value:0
19. TRITON2_APLL_CTL_OFFSET,address:3a,value:16
20. TRITON2_DTMF_PGA_CTL2_OFFSET,address:3c,value:0
21. TRITON2_DTMF_PGA_CTL1_OFFSET,address:3d,value:0
22. TRITON2_VDL_APGA_CTL_OFFSET,address:44,value:0
23. TRITON2_RX_PATH_SEL_OFFSET,address:43,value:30
I also try to manual reset all regesisters when audio abnormal. After reset, there are some difference:
mcbsp clock config:
1. CM_FCLKEN_PER,address:48005000,value:7ffff
2. CM_ICLKEN_PER,address:48005010,value:7ffff
3. CONTROL_DEVCONF0,address:48002274,value:5000040
4. MCBSP2_PCR0_REG,address:49022048,value:f
5. MCBSP2_SRGR2_REG,address:49022028,value:301f
6. CM_IDLEST_PER,address:48005020,value:0
7. MCBSP2_SPCR1_REG,address:49022014,value:0
8. MCBSP2_SPCR2_REG,address:49022010,value:20f
9. MCBSP2_XCR1_REG,address:49022024,value:40
10. MCBSP2_IRQSTATUS_REG,address:490220a0,value:4f82
11. MCBSP2_XCR2_REG,address:49022020,value:8041
12. MCBSP2_RCR1_REG,address:4902201c,value:40
13. MCBSP2_RCR2_REG,address:49022018,value:8041
14. MCBSP2_SRGR1_REG,address:4902202c,value:fff
15. MCBSP2_MCR1_REG,address:49022034,value:0
16. MCBSP2_MCR2_REG,address:49022030,value:0
17. MCBSP2_RCERA_REG,address:49022038,value:0
18. MCBSP2_RCERB_REG,address:4902203c,value:0
19. MCBSP2_XCERA_REG,address:49022040,value:0
20. MCBSP2_XCERB_REG,address:49022044,value:0
21. MCBSP2_REV_REG,address:4902207c,value:23
22. MCBSP2_RINTCLR_REG,address:49022080,value:0
23. MCBSP2_XINTCLR_REG,address:49022084,value:0
24. MCBSP2_ROVFLCLR_REG,address:49022088,value:0
25. MCBSP2_SYSCONFIG_REG,address:4902208c,value:0
26. MCBSP2_THRSH2_REG,address:49022090,value:0
27. MCBSP2_THRSH1_REG,address:49022094,value:0
28. MCBSP2_IRQENABLE_REG,address:490220a4,value:0
29. MCBSP2_WAKEUPEN_REG,address:490220a8,value:0
30. MCBSP2_XCCR_REG,address:490220ac,value:0
31. MCBSP2_RCCR_REG,address:490220b0,value:0
32. MCBSP2_XBUFFSTAT_REG,address:490220b4,value:2fd
33. MCBSP2_RBUFFSTAT_REG,address:490220b8,value:0
codec config:
1. TRITON2_ATXL1PGA_OFFSET,address:a,value:0
2. TRITON2_ATXR1PGA_OFFSET,address:b,value:0
3. TRITON2_ARXR1PGA_OFFSET,address:10,value:3f
4. TRITON2_ARXL1PGA_OFFSET,address:11,value:3f
5. TRITON2_ARXR2PGA_OFFSET,address:12,value:3f
6. TRITON2_ARXL2PGA_OFFSET,address:13,value:3f
7. TRITON2_AVTXL2PGA_OFFSET,address:c,value:0
8. TRITON2_AVTXR2PGA_OFFSET,address:d,value:0
9. TRITON2_VRXPGA_OFFSET,address:14,value:0
10. TRITON2_ARXL1_APGA_CTL_OFFSET,address:19,value:b
11. TRITON2_ARXR1_APGA_CTL_OFFSET,address:1a,value:b
12. TRITON2_ARXL2_APGA_CTL_OFFSET,address:1b,value:b
13. TRITON2_ARXR2_APGA_CTL_OFFSET,address:1c,value:b
14. TRITON2_BTPGA_OFFSET,address:1f,value:0
15. TRITON2_ALC_CTL_OFFSET,address:2b,value:0
16. TRITON2_DTMF_FREQSEL_OFFSET,address:30,value:0
17. TRITON2_DTMF_TONOFF_OFFSET,address:35,value:0
18. TRITON2_DTMF_WANONOFF_OFFSET,address:36,value:0
19. TRITON2_APLL_CTL_OFFSET,address:3a,value:16
20. TRITON2_DTMF_PGA_CTL2_OFFSET,address:3c,value:0
21. TRITON2_DTMF_PGA_CTL1_OFFSET,address:3d,value:0
22. TRITON2_VDL_APGA_CTL_OFFSET,address:44,value:0
23. TRITON2_RX_PATH_SEL_OFFSET,address:43,value:30
But I think it is causd by reset, not mean to MCBSP configure error.
Curretly we can locate the issue is on TPS65950,because we only re-configure MCBSP when audio abnormal, but after reset audio still abnormal. But the question is why configure value of codec are all right and what cause the audio abnormal?
Thank you
This was firstly post on processors forum (https://e2e.ti.com/support/processors/f/791/t/828610) But I can not choose audio forum since the part number is TPS65950.
