TPS7A4001: Intermittent drop in output voltage of TPS7A4001.

Hello Pandu,

It sounds like the device is not going into thermal shutdown.
Let's try to rule out a couple of additional items.
Can you please capture high quality measurements of the input voltage and enable voltage when the intermittent behavior is present?
High quality measurements would be with short loop areas in the oscilloscope probe and ground path.
If you have 4 channels available, it would be helpful to have the input current and output voltage measured as well.

If something is causing the input voltage to drop below the UVLO threshold, or if something is causing the enable voltage to drop below the disable threshold, then the linear regulator would be turning off at the same time.  Even fast transient conditions can cause the LDO to trip, if that is happening.

Please reply back with these measurements and we can continue the troubleshooting.
I'm looking forward to your reply.

Thanks,

- Stephen

Hi Stephen,

Attached the circuit diagram how i am using the Linear regulator in my application.

As you asked i did probe the Input voltage and Enable pin voltages (in this case they are same), they both are almost DC with AC input to rectifier. I did apply external DC directly after the rectifier output (i.e. @ C13)

 in both cases the intermittent behavior exists. Just to make sure load current is less than 50mA i directly applied 14V @ the output of linear regulator and the load current is just 18mA. There shouldn't be any Current limit/ thermal shut down happening in this scenario.

There is a gate drive circuit loaded on 14V Bias which has switching frequency of gate drive output of 130kHz, with other constant loads like 5V linear regulator, just for giving you what load i am using on this regulator.

I am not able to understand this behavior from the linear regulator. Input current goes to zero and output voltage starts falling eventually till current recovers.

The same behavior is not observed in another PS PBA with exact same circuit and same load as shown in above fig. The second board is only reaching the regulated voltage during start-up and drops to 12.23V immediately and there are spike intermittently during which there is exponential rise from 12.23V to 13.2V and comes back to 12.23V. I am not sure why would a linear regulator fails to regulate and behaves drastically different on two boards are there any fundamental errors i am doing in the linear regulator usage?

Looking forward for your insight on this. Quick response is appreciated.

Thanks

Pandu S

Hi Pandu,

In my experience, I have seen noise coupling into the linear regulator cause an issue like you are describing.
The fact that you have a gate driver powered by this rail may give some hints.
Can you add a series gate resistor on the output of the gate driver to slow down the rising edge of the gate drive pulses?
Can you confirm that the gate driver has a decoupling capacitor very close to the gate driver IC?

Can you share your placement and layout?
Ideally the LDO should have its ground directly underneath it on layer 2, acting as a shield to protect against unwanted electric field coupling between the plane layers of the PWB.  If layer 2 is not ground of the LDO, then switching noise may be getting into the feedback pin which is then amplified by the gain of the internal error amplifier.  Keep in mind that this noise mechanism is electric field coupling, which is different than conducted EMI, so the solutions are not necessarily the same.

Another idea to try is to remove the speedup capacitor, C61, as a test.
If there is high frequency noise nearby, the capacitor will act as a low impedance and may be a path to injecting the noise into the feedback pin of the LDO.

Please reply back with this data and tests, and we can continue to work on the troubleshooting.

Thanks,

- Stephen