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TPS62290: Regulator running hot and very low impedance between SW pin and GND

Balaji N21
Prodigy 200 points
Part Number: TPS62290

Hi,

We have been using TPS62290DRVT as a power stage component in our design to derive 1.8V output delivering 25mA(during normal operation) from 5V power input via USB 3.0 connection. The design has been released for production & in the first batch of production boards we have two cases of Bad boards running hot and measuring very low impedance(16 Ohms and 55 Ohms) between SW node and GND of the board.However, We did not any shorts or low impedance between other pins (except GND) to GND or Vin to SW.

Both the bad boards output nearly 1.9V output instead of nominal 1.8V. We had probed the SW node w.r.to GND in the Bad boards & good board(working one) & we have attached the screenshots for your reference.

Our design is a USB powered product & VBUS from USB is provided to VIN of the TPS62290. We have attached the snapshots of power section of our design and the layout of TPS62290DRVT for your reference.

We did go through several other tickets in the TI community describing similar issues in the different part no. but we are unable zero in to the exact cause of this issue.

It is to be noted that during the proto-design stage we have put several units for long run test and had gone through lot of plugging/un-plugging as this is a USB powered product. Despite all this we did not find the regulator running hot.

We have seen just two cases but we are not sure whether this is could be a latent issue in rest of the boards in the batch.

Kindly take this as priority & let us know on this ASAP. At present, We are half way into the process of the next batch of production.

Balaji

Waveforms & Design Files.zip

  • 0
    TI__Expert 3645 points

    Hello,
    I check your schematic and layout, and they seem ok. I only see in the layout that the output capacitor has a long path to ground, but I don't think this is the root cause of your failure. From the scope plot (bad board), it seems that the low side transistor was damaged by electrical overstress, you can see from the undershoot and a small plateau in the waveform of the sw node and the small value of the impedance between Sw and GND that you measured. Did you protect the input?

  • 0 in reply to Alfonso Furio
    Prodigy 200 points

    Hi Alfonso,

    Thanks for the reply. 

    Regarding your question, We did provide a ESD diode("D1" in the schematic) between the 5V & GND.You can locate the same in the schematic which was shared. This diode is placed in proximity to the regulator and the USB connector as shown in the layout image which I shared earlier. Did I provide clarification for your question?

    Balaji 

  • 0 in reply to Balaji N21
    TI__Expert 3645 points

    Hello,

    thanks for your reply but it seems that even with a protection, the overvoltage damaged the device. Sometimes also the TVS diode are not enough fast to protect the device during the fast transient due to plug/unplug of the USB. Do you have long wire at the input that introduce parasitic inductance that can increase the overvoltage?

  • 0 in reply to Alfonso Furio
    Prodigy 200 points

    Hi,

    Thanks for your reply.

    Our device is connected to a USB host via a USB 3.0 micro-B to type-A cable (~1m). We have placed the 1.8V regulator nearby the USB connector & protection components as you can see from the schematics and layout snapshots which we had shared earlier. 

    Also, if this damage could be due to USB cable insertion/removal, Why cant the VIN pin of the regulator get damaged as the transient must come through that for SW pin to be affected?

    Please let us know.

    Balaji,

  • 0 in reply to Balaji N21
    TI__Expert 3645 points

    Hello,

    as said before the cable can introduce parasitic inductance that can create higher overvoltage even for msec. You can see from the schematic that the Vin is connected to the high side mosfet; if this mosfet is on, you can have Vin+overvoltage at the drain of the low-side mosfet (sw pin). At this point, if the overvoltrage exceeds the abs max ratings the device will be damaged.

  • 0 in reply to Alfonso Furio
    Prodigy 200 points

    Hi,

    Thanks for your reply! 

    However, I need further clarification on the below.

    1) As we had mentioned in the previous comment, a voltage transient at the VIN must pass through the FET to reach the SW pin of the regulator. Having said this, VIN must also get damaged as the absolute maximum rating is same for both VIN and SW. Also, there appears to be a soft start feature when EN = HIGH based on which the voltage at the output must rise gradually at the output. Can you please let us know on this?

    2) As per the application note by TI (http://www.ti.com/lit/an/slva494a/slva494a.pdf) , the absolute maximum ratings of SW pin are DC rating. Based on our understading, SW pin can damaged if an external source is applied to it with its magnitude exceeding the absolute maximum of the SW node. As the parasitic inductance cannot be considered as a constant source, We are unsure that this could be cause for the failure. Please let us know your thoughts.

    3) In the waveform of the bad board, we see the undesirable switching(extra HIGH pulse for short duration) in the OFF time which is not present in the waveform of good board. Can you please let us know on why this extra pulse should occur in the middle of the OFF time? We do understand that there is possibility for regulator internal circuitry to have got damaged but we think understanding the origin of extra pulse could give us some clues about the failure event.

    Kindly let us know your thoughts on this.

    Balaji

  • 0 in reply to Balaji N21
    TI__Expert 3645 points

    Hello,

    from the waveform and the low impedance between the sw pin and gnd, it is clear that the low side is damaged. Unfortunately is not easy to understand well the behavior of the device after such event because could be whatever. In example from the scope plot of the sw node you can see negative overshoot that are showing the conduction of the body diode of the low side. About the peak during the off time can be due to different cause; could be due to the overvoltage that damaged also the gate driver. About the abs max, you are right are reported only the dc value. Usually the ac value are slightly larger and valid for some nanoseconds. If you have further question you can contact me on this email: a-furio@ti.com