Hello,
Pg. 15 of the TPS51225 datasheet talks about the behavior of the TPS51225 during an OV and UV condition. My questions are regarding the following statements:
"When the VFBx reaches 0V, the driver output is latched as DRVH off, DRVL on."
"The undervoltage protection (UVP) latch is set when the VFBx voltage remains lower than UVP trip threshold for 250us or longer. In this fault condition, the controller latches DRVH low and DRVL low and discharges the outputs."
For both OV and UV, the datasheet uses the term, "latch". So when an OV or UV condition occurs and the devices latches, do you need to power cycle the part to get it to release the latch? The datasheet does not mention what happens when you are no longer in an OV or UV condition.
Also, a couple other questions:
What is NOC and ZC comparators for as seen on page 9? What does NOC and ZC stand for? Can we provide any insight into the resistor divider values for OC, NOC, and ZC?
Thanks in advance for your support.
Best Regards,
Brian Gosselin