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TPS65917-Q1: Control Signals PWRON and POWERHOLD logic design

Anand Krishnan M
Prodigy 40 points
Part Number: TPS65917-Q1

Hi TI Team,

I need to control TPS65917-Q1 using an external ON/OFF mechanical switch connected to PWRON pin.In the EVM design POWERHOLD pin is always connected to HIGH.As per the datasheet there must be a turn ON event for the PMIC to go into Active state.This can be achieved by following EVM board.With the external switch the PMIC turns OFF by giving a LOW to PWRON pin for some seconds as per the LPK_TIME.But my doubt is will the PMIC again turn ON to Active state as soon as I release the the Switch since POWERHOLD pin is always connected to HIGH.

Please help

Regards 

Anand

  • 0
    TI__Mastermind 30260 points

    Anand,

    In a real system the PWRHOLD would not be tied up to a high voltage all the time. An output pin from the processor would control the PWRHOLD input on the PMIC after the initial power-on of the system.

    This is common on EVMs because there is no processor to toggle the PWRHOLD pin from LOW to HIGH logic level.

  • 0
    TI__Genius 10000 points

    Anand,

    In addition to Brian's comments, PWRON has higher priority than POWERHOLD for ON requests. PWRON needs a falling edge to turn on the PMIC (like a push button). Then, once the falling edge is detected, either POWERHOLD (pin) or DEV_ON (register bit) need to be set high for the device to stay on. Otherwise, the device will automatically turn off after 8 seconds.

    To turn the device off, you can set POWERHOLD low, or have a long-press event on PWRON.

    Thanks,

    Nastasha