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TPS54218: Device not correctly working in degree temperature

Part Number: TPS54218

Dear team,

I use TPS54218 to generate 2.5 V supply for FPGA (see fig. 5). The capacitors right sides from power supply (C60-C66) is cappacitor near FPGA. When the TPS54218 is in temperature between (+100 Celsius and -20 DegC) it working normally and ouput voltage of this power supply is constant 2,5 V. But when the theperature gets under -20 DegC the ouput voltage of power supply with TPS54218 is not constant, but there is ramps between 2,2 and 2,9 V. I tryed add 3x 100 uF capacitors on output and changed inductor to 4,7 uH and too I changed compensation according to Texas Webbench (fig. 6) but result is the same. 

I also tried to put more load on the power supply output but result is the same.

When I meassuring current and switched output voltage on TPS54218 I found that probably regulation of TPS54218 is wrong, because there is sometimes negative current from inductor and output capacitors. Propably sometimes the TPS54218 does not turn off "bottom switch". I meassured this by small meassuring resisstors (RM, RN on fig. 6 and fig. 5), see figure 1 - 4. I am sorry for the noise on this figure .

I using this IO TPS54218 for another power supplies such as 3.3 V, 1.8 V etc. but in this case it working well.

Fig. 1: Output voltage from power supply with TPS54218 (temperature under -20degC):

Fig. 2: Current "from" power supply meassured by 1R Ohm ressisto (temperature under -20degC)r:

Fig. 3: Current from TPS54218 (meassured by 0R22 Ohm resistor), (temperature under -20degC):

Fig. 4: Current from TPS54218 (meassured by 0R22 Ohm resistor),(temperature under -20degC) - detail:

Fig. 5: Schematic of power supply with TPS54218 - (without changes)

Fig. 6: Schematic of power supply with TPS54218 - (added capacitors, changed inductor and compensation):

Best Regards,

Radek

  • Hi Radek,

    thanks for your detailed information about your case.

    I will need to look into this with more detailed, could you meanwhile answer my below questions:

    1. Please confirm that you see no issues between -20degC and +100degC for 2.5V rail and no issue for 1.8V and 3.3V rails even below -20degC.

    2. How do you impose the temperature during your measurements? Do you have the capabilities in your lab to measure the actual device temperature?

    3. Can you confirm that your passives are qualified for the low temperature (I'd assume so).

    4. Do you see multiple devices with the same issue at lower temperatures or just one instance?

    Thanks a lot,

    Britta

  • Hi Britta,

    1. Yes, the 1.8V and 3.3V rails working normally even below -20degC. The 2.5 V rail working very well between 0degC and +100degC, between -20degC and 0degC is function acceptable, but there is "weak ramps" on output voltage. Under the -20degC is output voltage really bad with ramps (as in the Fig. 1) - more frost - bigger ramps on output voltage.  

    2. We have industry freezer with digital controler of temperature, in addition we meassure temperature on our device by contact thermometer GMH 1150 - type K. We need our device working in teperature range -40degC and +100degC.

    3. Resistors are qualified for the low temperature,

    10u; 47u; 100u and 470n capacitors --> X5R dielectric,

    4u7; 100n; 22n and 12n capacitors --> X7R dielectric,

    470p capacitors --> NP0 dielectric,

    120p capacitors --> C0G dielectric.

    Both inductors are qualified for -40degC to +125degC.

    4. Yes, we have more of the same devices with the same issue at lower temperature.

    Thanks,

    Radek

  • Radek,

    The most likely cause is too aggressive compensation.  At cold temperature, the power stage gain my increase and push the crossover frequency too high.  The other possibility is layout.  A known cold start up problem occurs if the input capacitors are not connected to VIN and GND with very low impedance path with very low parasitics.  However this looks like a stability issue to me.

  • Radek

    While the loop response for your original design looks mostly ok, the output inductor is rather large and the output capacitors are rather small.  The loop simulation on your modified schematic was a mess.  If possible, please try these values:

    L3 = 1.5 uH

    R117 = 19.1 k

    C179 = 2.7 nF

    C178 = 27 nF

    For the out put capacitance use a single 100 uF cereamic.  It is ok to leave the HF bypass caps (470 p, 100 n) in place.

    Let me know if that works for you.  If not we will need to investigate your layout.

  • Hi Radek,

    did you have the chance to look at the suggestions that John made? 

    Please let us know whether your problem was solved so that we can close this thread.

    Thanks and best regards,

    Britta

  • Hi Britta and John,

    Yes, I have tested it with this change. But there is the same problem.

    But when I try push onto cetain place on the board the 2.5V rail starts to be fine.

    I tried to replace IO TPS54218 several times, for some boards is 2.5V rail fine but for some it is not.

    I will try replace "working IO on 2.5V rail" with IO that not working IO and check our layout.

    I will constact you with result by the ond of week.

    Thanks and best regards,

    Radek

  • Hi Radek,

    was there any update on your most recent tests? My latest status is that you wanted to check the layout and replace an IO on the board.

    Have you made any progress with regards to having a working circuit now?

    Please let me know whether this problem is fixed or if we can further support you.

    Thanks,

    Britta

  • Hi Radek,

    please note that I will close this thread due to inactivity.

    Let me know in case there are further questions on your side or open a new thread in case you see any other issues in the future.

    Thanks and best regards,

    Britta

  • Hi Britta,

    I am sorry for my later answer.

    I tested it again, but the final solution was to replace these "bad" IOs on a 2,5 V rails from new batch from our supplier. I used the configuration in form my first post.

    I thing the problem may be in bad IOs, bad storage of this IOs or bad proces of soldering. The layout looks good.

    We will tested it again in larger sample of our devices with this IO in the comming months.

    Thanks a lot.

    Best regards,

    Radek

  • Hi Radek,

    as there is currently no activity on this thread I ill go ahead and close it.

    Please feel free to ope a new thread when you've conducted tests with a larger sample size and still see the same issue. 

    Best regards,

    Britta