This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS51124: TPS51124 Power Sequencing Question

Part Number: TPS51124

Are there any special power sequencing requirements for the TPS51124?  I have a system where if the 5 volts comes up before the main supply voltage(12 Volts in this case) the power supply will not turn on, the output voltage stays at 0 volts and the PowerGood signal never asserts itself.  If the 12 Volt main supply comes on first followed by the 5 volts then the voltage regulator comes up normally.  I am looking through the datasheet but haven't found any specific requirement as to which voltage needs to be active first.  Do you have any idea what could be causing the module to not start as expected?

  • Hello user,

    Out normal support person for TPS51124 is on holiday, but I believe I know the answer.

    If you apply 5 V to the TPS51124 without the 12 V (or other voltage) to the external switching FETs and allow the converters to enable,  the TPS51124 will go thru its start up sequence, but since there is no voltage on the output stage, there will be no output voltage.  After 1.7 times the SS time, the under voltage protection is activated and the low side and high side FETs are both latched off.  Now if you apply 12 V to the output devices, the TPS51124 is still latched off.  If you keep EN pins low, it should not matter which supply you bring up first as long as both are present before the converters are enabled.

  • Good Morning,

    So, I have a situation where the product already has this power supply designed in.  What would happen if I left the enable pins disconnected and floating?  I imagine this would also result in a situation where the power supply does not function correctly. 

    Do you have another similar power supply in the QFN24 package with a similar pinout that doesn't have this under voltage protection?  I am looking for a pathway to fix this without changing the current board layout.

    Thanks!

  • User,

    The data sheet is unclear about it.  In most converters, there is an internal pull up.  In that case, the converter would attempt to start, but you would have the same issue as above.  Your best bet would be to use 12 V divided down below 6 V (abs max voltage for enable pins) as an enable signal, so that the devices held off until both voltage rails are present.  I don't believe we have a pin compatible device with no UVP.

  • As Tucker’s comment, there is no similar IC without UVP, Generally most of power IC has UV protection. And For those ICs, which have two power supply to start up, if logic power(5V) and EN come before Vin, IC detect Vout is lower, then UVP will be triggered. So Suggest you to change the power up timing, Input supply power on first and then power on 5V for 5FLT and 5Vin, Seems no state defined for EN floating for this part, possibly it is uncertain state, so recommend not make EN floating, better make it power up at last under another power or logic control, or power up with 5VIN together after VIN ready. Yuchang
  • Thank you for your response.  Right now I am in a situation where logic power and Vin are being provided by the customer and I have no way of altering how their power ramps.  This puts me in a situation where I need to find a work around or redesign for the product.  Is there no option to turn off UVP?  I know its a long shot but I wanted to ask any way.  Is there any internal firmware that could be modified?

  • If you have reserved EN divider resistors, you can make EN asserted after VIn ramps up to >5V, this should be safe, but seems you make EN floating, no reserved circuit, So Possibly you need to redesign it if you cannot change the timing, because UVP can’t be disabled, and it shoud be same for most of devices.

    Yuchang