UCC28740: Ucc28740 stops every 2ms

Cs.pdf

uS Mosfet Switchingus Mosfet switching.pdf

Ms Mosfet Switching.pdfMs Mosfet switching

I think I found my problem .

  Is it safe to assume that Vdd needs at least 2.65mA to run  and only 0.1ma  to start ? (safer to have 5ma at all time)

I checked , I actually have 100mA on VDD..so it cannot be the issue... what else do you suggest ?

Is it possible that Vdd is too low at 12V ?

Our CS , CS and Mosfet Sw all look good.

We tried adding 100uF on the Vdd and observe that it takes 6s to start up (much longer than before)

Hello User5327551,

It is understandable that adding 100uF to VDD will cause the start-up time to increase significantly.  Presumably, this huge value is intended for testing only and not intended for permanent change.  I had suspected earlier that the 2ms timing between switching intervals may have been due to the cycling of VDD and after calculating a possible capacitance based on this suspicion, I suggested increasing the value.   Since then you indicated that VDD was ~12V, and we concluded that VDD was not the issue.  Experiencing the problem even with 100uF confirms that, so I recommend to revert back to your original value.  If you could please post a schematic diagram of the UCC28740 converter, it would help a lot to diagnose the problem.  Please include transformer inductance and turns ratios, too. 

Please post your waveforms for VS, CS and MOSFET Vsw, showing only one or two cycles.  Your previous waveforms were at a time sweep much too slow to discern any details about these signals.  Please use a low-capacitance probe on VS.  Normal probes (with capacitance of 10~15pF) can distort the VS signal too much and affect regulation.

Also, please include a screenshot of CS and VOUT at 1ms/div. 

Regard,

Ulrich   

OK but by using 100uF in the VDD I am able to calculate the RC time constant to charge it...and I arrive at around 40.000 Ohm (to charge the cap in 6s) and that  R indicates there is only about 0.5ma on the rail..

  Am I correct  to calculate it like that ?

Hello User5327551,

At start-up, the VDD capacitor is charged up by current derived from a JFET on the HV pin, which is usually connected to the bulk rail.  This current is relatively constant (not exponential), so timing can be calculated by i/c = dv/dt.  The typical charging current through HV is 250uA.  250uA/100uF = 2.5V/s.  Inverting that gives you 0.4s/V and to go from 0V to 21V start-up threshold gives you 0.4s/V x 21V = 8.4s.  Your 6s start-up time is faster than this (assuming VDD starts at 0V), so it indicates that the HV current is somewhat higher than the typical 250uA (namely, about 350uA).   

Regards,
Ulrich

Hi Ulrich

 previously we used 22uF as Vdd capacitance , we will try tomorrow to change to 10uF (as per datasheet of TI). Do you think that more capacitance on Vdd can explain those issues ?

Hi User5327551,

No, I think that VDD is not involved with the issues causing the shutdown-restart cycles.  I recommend to just keep it at 22uF from now and we'll concentrate on other possibilities.  Changing to 10uF will just add another variable into the mix that isn't necessary at this time.  VDD cap can be optimized later after all other functionality is working correctly. 

This is where I need to review your schematic diagram, so I can look for potential sources of problems that we can investigate and debug.  I look forward to seeing one (including transformer details) as soon as you can manage it, or else progress is likely to be very slow.   The waveforms that I asked for, too, although I understand that it may take a little while to generate them.  Please send the schematic ahead of time. 

Regards,
Ulrich

Hello , this is the schematic SMPS TI.pdf

Transformer details smps transformer.pdf

Do you need anything else ?

Dear Ulrich

  your sugestion of removing the C26 made the Mosfet behave properly (ie is not stopping any longer every 2ms)

We still have a 1.5Khz noise bumb (200uV so rather low)..any idea what can cause it ?

   In any case we are fine tuning the FB , CS.

  At last we can get only up to 2.5A (89Khz switching frequency) . AT 2A we switch at arounf 75Khz . Do you think we cannot reach 3A because SW is too high ?

THX YOU . Great help.

Hi ,

 we solved the 3A issue (by making sure that switching frequency is under 70Khz at maximum load)

Now I have one more issue ...as you can see attached we have a spike at 6Khz and harmonic (1A and 2A switching at 30-40Khz) .

  Any idea what can cause it ?

Just an update , when using 10R in Gate of Mosfet we see a reduction (6db) of 6khz noise and harmonics

Anyway to have a way around it ? It creates more problem than solving (EMI.)

  How about if I move the SW frequency around 28Khz...it will be disabled  ?

ANy other way to move this noise out of audio band (20Khz)

 AT 3A and 54Khz switching noise is moving to 8.2Khz.. and harmonic.

Hello User53275551,

The frequency-dither feature is not adjustable.  It is theoretically possible to design the converter to operate at 3A output at frequencies below 28kHz to disable the dithering but this will severely de-optimize the transformer size and overall efficiency, and I think it will result in a current limit much higher than 3A.  I think it will also result in a much higher minimum load requirement to avoid OVP at no-load (due to the 170-Hz minimum switching frequency).
I do not recommend this course of action.

Your FFT graph is labeled in dBV, and the peak signals are all well less than 1mV (-60dBV).  What voltage is being measured?  Is this measured at the output or the input; common mode or differential?   

What problem is being created?  Do you actually hear audible noise at these harmonic frequencies?  If so, which component(s) is it coming from? There may be a different way to solve the problem, depending on what is making noise.

Regards,
Ulrich

Hi

We are able to have a load of 0.8A switching at 26Khz (stable , no dithering)  . Noise on the system is amazingly good at around 5uV

  Please note that we design this PSU as a ultra low noise PSU and noise is very important to us and our customers .

  As soon as we go to load 1A , switching frequency is between 26-32Khz and of course noise is back .

What can we do to keep dithering out at least up to 1.5A ? Any changes in VS , CS or even FB (maybe use a different CTR opto feedback)  levels  that will allow it ? We can live with dithering above 1.5A

 At last , we are thinking that we could move to IC 28720 that seems it has no frequency dithering and its almost pin to pin (without the FB)

  This has been very helpful we have been looking for an answer for the past months. I will close the thread after your answer, with my many , many thx!!

Hi User5327551,

The UCC28720 controller is possible, since it does not have the dither function, however it works with primary-side regulation (PSR) which uses the reflected output voltage on the auxiliary winding to regulate.  So it will not have as accurate of output regulation.  More like +/-5% rather than +/-1% from the SSR scheme.  Also, it is designed to drive a BJT, not a MOSFET, if that is a concern.

Staying with the UCC28740 will require moving the 1.5A load point to below the AM frequency (32kHz) to keep the dither off.  The constant current regulation (basically the current limit) only works in the upper FM region.  Since the control law has a 4:1 Ipp range through the AM region, output power goes as Ipp squared, or 16X more.  For a fixed voltage, you won't get a CC limitation until Iout reaches 16 x 1.5A = 24A!  It won't really get that high because the rest of the power train cannot support that total power, but one also doesn't want to find out where everything collapses, either.  It will vary with line voltage.

I don't think trying to work below the dither point is going to be practicable.  If you don't already have a post L-C filter, may I suggest trying to attenuate the harmonics?  If you do have one, maybe it can be modified to attenuate more. 

Other options are to consider the UCC28600 flyback controller, or LM5023.  Neither have the built-in HV start-up, though.  If a really strong business case can be made, TI could develop a custom version of the -740 without dithering.  I'm afraid that I'm out of additional ideas, but I'll ask internally if there are other options.

Regards,
Ulrich 

Hello ,  I would prefer to work with the Ucc28740

   Do you know with whom I should talk regarding a custom version of the IC ? I know that qty will have to be high , but how high..

 I am attaching what I currently achieve on 1A (rather 0.9A) whitout dither. Note this is the quietest SMPS in the ..world.

   OK let me know if anyone knows of a solution and please ask someone to contact me for a custom solution .

   Again...I want to stress that rarely I have seen such outstanding support. Thx you Ulrich .

Hello

 any solution ?