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TPS3895: Sense Pin immunity & Output Delay

Part Number: TPS3895

Hello TI Team,

We are currently working with the TPS3895A and would like some confirmation on my understanding of the sense pin immunity and output delay.

The falling output delay is specified as 16us. It is my understanding that the output goes low once the sense goes below VIT+ -Vhys for >16us. Suppose we have a pulse on the sense pin that goes below VIT+ -Vhys and is less than 16us, and then recovers above VIT. The "delay" does reset, correct?

Regarding the sense pin immunity, we are using the following equation to calculate the Overdrive %:

[(VDD/ VIT-) - 1] × 100%.

With Vdd = 5V and VIT = 0.5V, I calculate an overdrive of 900%, which is outside the graph that is provided in the datasheet, but seems to reach 3us. Am I approaching this correctly?



  • Hi Edgar,

    The TPS3895A is meant to monitor the voltage at sense for system voltages thresholds above 0.5V. Are you using the 0.5V threshold? If you are using a resistor divider network, the VIT in the calculation should be taken as such. Your initial understanding of glitch immunity is incorrect. If a pulse is smaller than the pulse duration of glitch immunity, it will be completely ignored.