Other Parts Discussed in Thread: TPS3808
Team,
My customer has the following question:
I am currently using the TPS3808-EP( Low Quiescent Current, Programmable Delay Supervisory Circuit) in
one of our designs here to control the relative delay time between two different Reset signals.
Under worst case conditions, I am trying to make sure the right CT(external capacitor that sets the Reset delay time) capacitors are chosen to maintain adequate delays between the 2 signals to meet design timing specifications.
The problem is for given CT capacitor values the datasheet specifies a very large (50% to 75%) delay range in the 6.6 Switching Characteristics table, etc. over the operating temperature range ( (TJ = –55°C to +125°C), which seems to contradict the following plots in the datasheet:
Figure 3. RESET Timeout Period vs CT
Figure 4. Normalized RESET Timeout Period vs Temperature
Can you tell me the reasoning behind the wide range for the Reset Time delay over temperature in
section 6.6 Switching Characteristics of the datasheet ? Can you clarify this for me?
Regards,
Aaron