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UCD3138: UCD3138 and UCD3138064 startup time and pins initial state

Jack Wang
Intellectual 310 points
Part Number: UCD3138

Hi TI experts,

 - How much time does UCD3138 and UCD3138064 needed for starting to work after it is powered?

 - What is the initial state for each UCD3138 and UCD3138064 pin after it is powered before it starts to work ?

Thank you,

Jackw

  • 0
    TI__Mastermind 18370 points

    Hello Jack,

    The time of course is a function of your VCC ramp up slew rate.

    The slew rate can be different in different applications, but it has to be within certain limits defined in the data sheet.

    As you know, the device also spends up to 100 mS in ROM Bootloader, before it executes your firmware.

    1. The behavior of the digital GPIOs are different during the following 3 conditions: A) VCC=0,  B)  0.7V < VCC <2.9V (Ramping up),  C) VCC > 2.9V .

       

    2. The digital GPIOs in all members of UCD3138 family of products act the same under the condition A (VCC=0) and under the condition C (VCC> 2.9V, also referred to as “after reset” in the data-sheet)
      Meaning in all UCD3138 products:

      Under condition A (VCC=0), the standard digital GPIO pins (Excluding the open-drain pins) will sink current from a higher voltage, if externally connected to the pin.

      This is due to the fact that the ESD diode used for protection against Electro Static Discharge is connected to VCC.

      Under condition C (VCC > 2.9V), the standard digital GPIO pins (Excluding the DPWMs) will be configured as inputs and have high impedance.

       

    3. During Condition B (VCC is ramping up):

      The digital GPIOs in UCD3138 and UCD3138064 are high impedance.

      The digital GPIOs in UCD3138A64, UCD3138128, UCD3138A, UCD3138064A, UCD3138A64A, UCD3138128A are kept as output low.

      You are correct about the fact that the difference in the behavior of the second group of Chips under condition C (0.7V < VCC < 2.9V) is not mentioned in the data-sheet.

     

    After the above effort to clarify the situation with standard digital GPIOs, let’s discuss the differences of DPWM outputs, open-drain GPIOs and analog inputs:

     

    1. DPWM outputs are configured as output lows under condition C (VCC >2.9).

    2. Open drain GPIOs will not sink any current under condition A (VCC=0). As their ESD structure is different (ESDC diode connect to ground only).

    3. Analog input are protected by ESD diodes as well. Therefore under condition A (VCC=0), they may not be high impedance and may sink current.

     

    Hope this make some order in the GPIO subject.

    Regards,

     

  • 0 in reply to Yitzhak Bolurian
    Intellectual 310 points

    Hi Yitzhak,

     - Got it. Thanks for your prompt reply.